Atmel AVR User Manual

Mnemonic Operands Description Op Flags
#Clocks
AVR
#Clocks
AVRxm
#Clocks
AVRxt
#Clocks
AVRrc
ANDI Rd, K Logical AND
with
Immediate
Rd ← Rd • K Z,N,V,S 1 1 1 1
OR Rd, Rr Logical OR Rd ← Rd v Rr Z,N,V,S 1 1 1 1
ORI Rd, K Logical OR
with
Immediate
Rd ← Rd v K Z,N,V,S 1 1 1 1
EOR Rd, Rr Exclusive OR Rd ← Rd ⊕ Rr Z,N,V,S 1 1 1 1
COM Rd One’s
Complement
Rd ← $FF - Rd Z,C,N,V,S 1 1 1 1
NEG Rd Two’s
Complement
Rd ← $00 - Rd Z,C,N,V,S,H 1 1 1 1
SBR Rd,K Set Bit(s) in
Register
Rd ← Rd v K Z,N,V,S 1 1 1 1
CBR Rd,K Clear Bit(s) in
Register
Rd ← Rd • ($FFh -
K)
Z,N,V,S 1 1 1 1
INC Rd Increment Rd ← Rd + 1 Z,N,V,S 1 1 1 1
DEC Rd Decrement Rd ← Rd - 1 Z,N,V,S 1 1 1 1
TST Rd Test for Zero
or Minus
Rd ← Rd • Rd Z,N,V,S 1 1 1 1
CLR Rd Clear Register Rd ← Rd ⊕ Rd Z,N,V,S 1 1 1 1
SER Rd Set Register Rd ← $FF None 1 1 1 1
MUL Rd,Rr Multiply
Unsigned
R1:R0 ← Rd x Rr (UU) Z,C 2 2 2 N/A
MULS Rd,Rr Multiply
Signed
R1:R0 ← Rd x Rr (SS) Z,C 2 2 2 N/A
MULSU Rd,Rr Multiply
Signed with
Unsigned
R1:R0 ← Rd x Rr (SU) Z,C 2 2 2 N/A
FMUL Rd,Rr Fractional
Multiply
Unsigned
R1:R0 ← Rd x Rr<<1
(UU)
Z,C 2 2 2 N/A
FMULS Rd,Rr Fractional
Multiply
Signed
R1:R0 ← Rd x Rr<<1
(SS)
Z,C 2 2 2 N/A
FMULSU Rd,Rr Fractional
Multiply
Signed with
Unsigned
R1:R0 ← Rd x Rr<<1
(SU)
Z,C 2 2 2 N/A
DES K Data
Encryption
if (H = 0) then
R15:R0
else if (H = 1)
then R15:R0
←
←
Encrypt(R15:
R0, K)
Decrypt(R15:
R0, K)
N/A 1/2 N/A N/A
Table 4-3. Branch Instructions
Mnemonic
Operands Description Op Flags
#Clocks
AVR
#Clocks
AVRxm
#Clocks
AVRxt
#Clocks
AVRrc
RJMP k Relative Jump PC ← PC + k + 1 None 2 2 2 2
IJMP Indirect Jump
to (Z)
PC(15:0)
PC(21:16)
←
←
Z
0
None 2 2 2 2
Atmel AVR Instruction Set Manual [OTHER]
Atmel-0856L-AVR-Instruction-Set-Manual_Other-11/2016
23

Atmel AVR Specifications

General

Architecture	8-bit RISC
SRAM	Up to 16 KB
Clock Speed	Up to 20 MHz
Operating Voltage	1.8V to 5.5V
ADC	10-bit ADC
Communication Interfaces	SPI, I2C, USB
Packages	DIP, SOIC, QFN
Special Features	Watchdog Timer
Flash Memory	1KB to 256KB
EEPROM	64B to 4KB