AudioArts Engineering D-16 - Clock;Timer Schematic Diagrams

GND
VCC
C32
0.1uF
GND
VCC
0.1uF
C3
GND
VCC
C18
0.1uF
VCC
GND
VCC
C28
0.1uF
VCC
R81 220
VCC
VCC
VCC
R79 220
R67 220
R74 220
GND
GND
GND
GND
VCC
0.1uF
C2
GND
VCC
C35
0.1uF
12
34
SW4
12
34
SW3
SW2
43
21
SW1
43
21
600 Industrial Drive
New Bern, NC 28562
page 7 - 4
D-16 / June 2006
CLK-55
10-22-04
16S00xx
W# 700815
CLK-55 Clock/Timer Schematic Sheet 1 of 2
CLK-55A PCB 1 OF 2
A
D
A
C
B
D
A
C
B
1
1
8
8
2
2
7
7
3
3
6
6
4
4
5
5
D
DWG. NO.FSCM NO.ISSUED
CHECKED
DRAWN
SHEETSCALE
CONTRACT NO.
REVSIZE
DATEAPPROVALS
- Sergey Averin -
SA
SA
SA
SW6
43
21
SW5
12
34
GND
GND
1
2
3
4
SW7
GND
R34
4.99K
VCC
R33
4.99K
VCC
R53
10.0K
+3.3V
R51
10.0K
+3.3V
R48
10.0K
+3.3V
R44
10.0K
+3.3V
R61
4.99K
VCC
R68
4.99K
VCC
R78
4.99K
GND
R75
4.99K
GND
C20
2.2F
GND
RVBAT
VCC
R32 220
VCC
R31 220
220R86
88.7K
R82
GND
330uF
C5
1500uF
C6
CT1
1
10
11 12
13 14
15 16
17 18
19
2
20
34
56
78
9
CT2
1
10
2
34
56
78
9
GND
GND
VCC
POLYSW
1.0A
F1
0.1uF
C7
0.1uF
C4
PQ05D
2
31
5
4
Q9
P4
OUT
VC
IN
GND
+REG
1N4002W
D1
R41 51
R43 51
R47 51
R50 51
R42 51
R46 51
R49 51
R52 51
VCC
SBD D4
R26 220
R28 220
R30 220
R24 220
R27
4.99K
GND
R25
4.99K
VCC
R29
4.99K
VCC
R23
4.99K
VCC
220 R88
DS7
VCC
332 R87
DS13
VCC
CT8
1
10
11 12
13 14
15 16
17 18
19
2
20
34
56
78
9
DS3
1
2
3
4
5
6
7
8
9
10
e
f
d
g
a
c
dp
b
COM2
a
COM1
dp
g
f
e
d
c
b
1
2
3
4
5
6
7
8
9
10
DS4
e
f
d
g
a
c
dp
b
COM2
a
COM1
dp
g
f
e
d
c
b
1
2
3
4
5
6
7
8
9
10
DS1
e
f
d
g
a
c
dp
b
COM2
a
COM1
dp
g
f
e
d
c
b
1
2
3
4
5
6
7
8
9
10
DS2
e
f
d
g
a
c
dp
b
COM2
a
COM1
dp
g
f
e
d
c
b
DS5
10
9
8
7
6
5
4
3
2
1
e
f
d
g
a
c
dp
b
COM2
a
COM1
dp
g
f
e
d
c
b
DS6
10
9
8
7
6
5
4
3
2
1
e
f
d
g
a
c
dp
b
COM2
a
COM1
dp
g
f
e
d
c
b
10
9
8
7
6
5
4
3
2
1
DS9
e
f
d
g
a
c
dp
b
COM2
a
COM1
dp
g
f
e
d
c
b
1
2
3
4
5
6
7
8
9
10
DS10
e
f
d
g
a
c
dp
b
COM2
a
COM1
dp
g
f
e
d
c
b
1
2
3
4
5
6
7
8
9
10
DS11
e
f
d
g
a
c
dp
b
COM2
a
COM1
dp
g
f
e
d
c
b
10
9
8
7
6
5
4
3
2
1
DS8
e
f
d
g
a
c
dp
b
COM2
a
COM1
dp
g
f
e
d
c
b
AUTO_SW
HOLD_SW
GND GND
GND GND
VCC VCC
XTMR_SYNC
XDATA
VCC VCC
XCLK_SYNC
XDATA_CLK
GND GND
VCC VCC
CLK_DSPL_D
CLK_DSPL_A
CLK_DSPL_B
CLK_DSPL_C
CLK_DSPL_D
CLK_DSPL_E
CLK_DSPL_F
CLK_DSPL_G
CLK_DSPL_DP
CLK_DSPL_A
CLK_DSPL_B
CLK_DSPL_E
CLK_DSPL_F
CLK_DSPL_C
CLK_DSPL_G
CLK_DSPL_DP
CLK_DSPL_D
CLK_DSPL_A
CLK_DSPL_B
CLK_DSPL_C
CLK_DSPL_D
CLK_DSPL_E
CLK_DSPL_F
CLK_DSPL_G
CLK_DSPL_DP
CLK_DSPL_A
CLK_DSPL_B
CLK_DSPL_E
CLK_DSPL_F
CLK_DSPL_C
CLK_DSPL_G
CLK_DSPL_DP
CLK_DSPL_D
CLK_DSPL_A
CLK_DSPL_B
CLK_DSPL_C
CLK_DSPL_D
CLK_DSPL_E
CLK_DSPL_F
CLK_DSPL_G
CLK_DSPL_DP
CLK_DSPL_A
CLK_DSPL_B
CLK_DSPL_E
CLK_DSPL_F
CLK_DSPL_C
CLK_DSPL_G
CLK_DSPL_DP
CLK_DSPL_D
CLK_DSPL_A
CLK_DSPL_B
CLK_DSPL_C
CLK_DSPL_D
CLK_DSPL_E
CLK_DSPL_F
CLK_DSPL_G
CLK_DSPL_DP
CLK_DSPL_A
CLK_DSPL_B
CLK_DSPL_E
CLK_DSPL_F
CLK_DSPL_C
CLK_DSPL_G
CLK_DSPL_DP
CLK_DSPL_D
CLK_DSPL_A
CLK_DSPL_B
CLK_DSPL_C
CLK_DSPL_D
CLK_DSPL_E
CLK_DSPL_F
CLK_DSPL_G
CLK_DSPL_DP
CLK_DSPL_A
CLK_DSPL_B
CLK_DSPL_E
CLK_DSPL_F
CLK_DSPL_C
CLK_DSPL_G
CLK_DSPL_DP
+DIGin
TMR_HOLD
+DIGin+REG
PIN15A
GND
GND
GND
GND
VCC
VCC
PIN15A
PIN15A
HOLD_SW
HOLD_SW
AUTO_SW
AUTO_SW
VCC
VCC
FROM CONSOLE
HOLD
RESET
START/STOP
AUTO
SET
MODE
T I M E R
C L O C K
TIMER: SECONDSTIMER: MINUTES
TO CONSOLE
TO CLD-220 PCB (CLOCK/TIMER DISPLAY) RIGHT
CLOCK: SECONDSCLOCK: MINUTESCLOCK: HOURS
TO CLD-220 PCB (CLOCK/TIMER DISPLAY) LEFT