CG VSR239p5 - Page 105

Emotron VS Series Quick Start Guide
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21
Brake Output
When the brake function selection is effective and
reach brake open condition, outputs signal ON
22
DI1
Output DI1 signal
23
DI2
Output DI2 signal
24
DI3
Output DI3 signal
25
DI4
Output DI4 signal
26～27
Reserved
28
DI7
Output DI7 signal
29
Digital comparator 1
Please refer to F3.00
30
Digital comparator 2
Please refer to F3.01
31
Analog comparator
1
Please refer to F3.02~F3.04
32
Analog comparator
2
Please refer to F3.05~F3.07
33
Timer 1
Please refer to F3.08～F3.12
34
Timer 2
Please refer to F3.13～F3.17
35
Timer 3
Please refer to F3.18～F3.22
36
Timer 4
Please refer to F3.23～F3.27
37
Timer 5
Please refer to F3.28～F3.32
38
Timer 6
Please refer to F3.33～F3.37
39
Timer 7
Please refer to F3.38～F3.42
40
Timer 8
Please refer to F3.43～F3.47
41
Timer 9
Please refer to F3.48～F3.52
42
Timer 10
Please refer to F3.53～F3.57
43
Timer 11
Please refer to F3.58～F3.62
44
Timer 12
Please refer to F3.63～F3.67
45
Frequency range is
arrived(within FDT1
upper limit and
lower limit)
When running frequency is within the range of FDT1
upper limit and lower limit, then this terminal output valid.
46
PID feedback loss
When PID feedback loss is detected, then this terminal
output valid
C1.04
Y1 output delay time
Range:0.0～6000.0s
Default:0.0s
C1.05
Y2 output delay time
Range:0.0～6000.0s
Default:0.0s
C1.06
Relay 1 output delay time
Range:0.0～6000.0s
Default:0.0s
C1.07
Relay 2 output delay time
Range:0.0～6000.0s
Default:0.0s
These four parameters define the delay response time of digital output terminals Y1 & Y2, relay 1
and relay 2.
C1.08
Enabled state of digital
output
Range:0000～1111
Default:0000
Unit's place: Y1
0: Positive logic; ON when current passes through
1: Negative logic; ON when no current passes through
Ten's place: Y2(VSX Only) (same as Y1)
Hundred's place: relay 1 output
0: Positive logic; ON when there is coil excitation
1: Negative logic; ON when there is no coil excitation
Thousand’s place: relay 2 output (VSX Only) (same as relay 1)
Wiring diagram of digital output terminal is shown as Fig. 6-13: