6. Appendix
70
BX-220 User’s manual
Table 6.1 POST Codes < 2 / 3 >
Description
CPU DXE installation start
CPU DXE installation start (Specific CPU module)
PCI host bridge installation
North Bridge DXE initialization starts
North Bridge DXE SMM initialization starts
North Bridge DXE initialization (Specific North Bridge module)
South Bridge DXE initialization starts
South Bridge DXE SMM initialization starts
South Bridge device initialization
South Bridge DXE initialization (Specific South Bridge module)
ACPI module initialization
For future AMI DXE codes reserved
OEM DXE initialization code
Boot Device Selection(BDS) Phase
PCI bus initialization starts
PCI bus hot plug controller initialization
PCI bus resource requests
PCI bus resource allocation
Console output device connection
Console input device connection
For future AMI codes reserved
IDE initialization starts
SCSI initialization starts
ASL for reserved (Refer to ACPI/ASL Checkpoints)
ASL for reserved (Refer to ACPI/ASL Checkpoints)
Virtual address maps run-time settings begin.
Virtual address maps of runtime configuration exit
Legacy option ROM initialization