5. Each Component Function
User’s Manual
65
Watchdog Timer
The watchdog timer is started by output of A5 to I/O port address
4002h. A second output of A5 to the same port within the
specified expiration time once again triggers the watchdog timer.
If a time-out occurs, a reset or an interrupt is generated according to
the 4004h port setting or an alarm is output according to the 4004h
port setting.
The expiration time can be set in a range of 244.14 µsec through
255sec using the counter clock setting in combination with the
timer setting of port (4003h) for the WDT counter.
The watchdog timer stops by reading port 4002h. The alarm-out
output is cancelled at the same time.
The alarm out is output from the RAS connector's PO2/WDT (pin
12) and cancelled when reset.
The alarm-out output can be set to BIOS startup by BIOS setup (see
Chapter 4), watchdog timer startup, or watchdog timer time-up.
Specifications
- Time to be set: 244.14µsec-255sec (Port setting)
- Interrupt or reset: Resets or generates an interrupt at time-
up (Port setting).
- External alarm output: Photocoupler insulated open-collector
output (the output status is set by
software). For more information, see
the general-purpose I/O specifications.
- I/O addresses: 4000h through 4007h (RAS port)
0070h, 0071h (RTC)
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