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Cypress CY3684 - Appendix; U2 (GAL) Code (File Is FX2 LP.ABL)

Cypress CY3684
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EZ-USB Development Kit User Guide, Doc. # 001-66390 Rev. *D 111
A. Appendix
A.1 U2 (GAL) code (file is 'FX2LP.ABL')
MODULE fx2lp
" Swapped dipswitch settings 00 and 10 on 4-3-98 to allow the all-switchon
default
x,c,z = .X.,.C.,.Z.;
"Inputs
A12,A13,A14,A15 pin 11,12,13,16;
A11 pin 4;
nRD,nPSEN,CLKOUT pin 6,5,2;
mm1,mm0 pin 9,7;
"Outputs
EA,nRAMOE,nRAMCE pin 21,25,27;
PF0,PF1,PF2,PF3 pin 17,18,19,20 istype 'reg_sr';
modesw = [mm1,mm0]; " two dipswitches
addr = [A15,A14,A13,A12,A11,nRD];" high nibble of the address bus + RD
equations
" The 3681 board turns PF0 on at 0x80xx reads and off at 0x81xx reads.
" This board turns PF0 on at 0x8xxx reads and off at 0x88xx reads.
PF0.S = (addr == ^b100000);
PF0.R = (addr == ^b100010);
PF0.CLK = CLKOUT;
PF1.S = (addr == ^b100100);
PF1.R = (addr == ^b100110);
PF1.CLK = CLKOUT;
PF2.S = (addr == ^b101000);
PF2.R = (addr == ^b101010);
PF2.CLK = CLKOUT;
PF3.S = (addr == ^b101100);
PF3.R = (addr == ^b101110);
PF3.CLK = CLKOUT;
WHEN (modesw == 00) THEN" No external memory
{
nRAMCE = 1;
nRAMOE= 1;
EA = 0;
}
ELSE WHEN(modesw == 01) THEN" Ext P&D mem at 8000 (can add mem to 0-8K)
{
!nRAMCE= A15;
!nRAMOE= !nRD # !nPSEN;" Combine program & data memory
EA = 0;
}

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