Delta AH500 - Page 422

AH500 Programming Manual
6-254
API Instruction code Operand Function
1110 SFR P
D, n
Shifting the values of the bits in the
16-bit registers by n bits to the right
Device
X Y M S T C HC D L SM SR E PR K 16# “$” DF
D
        
n











Pulse instruction
16-bit instruction (5 steps)
32-bit instruction
AH500
AH500
-
Symbol:
D
：
Device involved in the shift Word
n
：
Number of bits Word
Explanation:
1. The values of the bits in D are shifted by n bits to the right. The vacancies (b15~b15-n+1)
resulting from the shift is filled by 0, and the value of bn-1 is transmitted to SM602.
2. The operand n should be within the range between 1 and 16.
3. Generally, the pulse instruction SFRP is used.
Example:
When X0.0 is ON, the values of b0~b15 in D0 are shifted by 6 bits to the right, and the value of b5 is
transmitted to SM602. The values of b10~b15 are cleared to 0 after the shift.
The shift of the values of the bits to the right during a scan is illustrated as follows.

b5~b0
→ Being carried (The value of b5 is transmitted to SM602.)

b15~b6
→ b9~b0
 0
→ b15~b10
After the shift
Carry flag
Carry flag
0
b0b15
b0
b15
0
0 0 0 1 0 1 0 1 0 1 0 1
0
0
0
1
0 1 0 1 0 1 0 1 0 1 0 1
0 1
0
※
Being filled by 0
Additional remark:
If n is less than 0, or if n is larger than 16, the instruction is not executed, SM0 is ON, and the error
code in SR0 is 16#200B.