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Delta AH500 - Page 423

Delta AH500
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Chapter 6 Applied Instructions
6-255
API
Instruction code Operand Function
1111 SFL P
D, n
Shifting the values of the bits in the
16-bit registers by n bits to the left
Device
X Y M S T C HC D L SM SR E PR K 16#
“$” DF
D
n
Pulse instruction
16-bit instruction (5 steps)
32-bit instruction
AH500
AH500
-
Symbol:
D
Device involved in the shift Word
n
Number of bits Word
Explanation:
1. The values of the bits in D are shifted by n bits to the left. The vacancies (b0~bn-1) resulting
from the shift is filled by 0, and the value of b16-n is transmitted to SM602.
2. The operand n should be within the range between 1 and 16.
3. Generally, the pulse instruction SFLP is used.
Example:
When X0.0 is ON, the values of b0~b15 in D0 are shifted by 6 bits to the right, and the value of b10
is transmitted to SM602. The values of b0~b5 are cleared to 0 after the shift.
The shift of the values of the bits to the left during a scan is illustrated as follows.
b15~b10
Being carried (The value of b10 is transmitted to SM602.
b9~b0
b15~b6
0
b5~b0
After the shift
Carry flag
C
arry flag
Being filled by 0
1
b0b15
b0
b15
0
0 0 1 1 1 1 0 0 0 0 0 0
1
1
0
0
1 1 1 1 0 0 0 0 1 1 1 1
0 0
0
Additional remark:
If n is less than 0, or if n is larger than 16, the instruction is not executed, SM0 is ON, and the error
code in SR0 is 16#200B.

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