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Delta AH500 - Page 581

Delta AH500
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Chapter 6 Applied Instruction
6-413
API
Instruction code Operand Function
1807 CRC
S, n, D
Cyclic Redundancy Check
Device
X Y M S T C HC D L SM SR E PR K 16# $”
DF
S
n
D
Pulse instruction
16-bit instruction (7 steps)
32-bit instruction
- AH500 -
Symbol:
S
Initial device to which the CRC is applied Word
n
Number of bytes Word
D
Initial device in which the operation result is stored Word
Explanation:
1. Please refer to the additional remark on the instruction CRC for more information about the
CRC check code.
2. The operand n should be within the range between 1 and 1000. If n is not within the range, the
operation error occurs, the instruction is not executed, SM0 and SM1 are ON, and the error
code in SR0 is 16#200B.
3. The 16-bit conversion mode: When SM606 is OFF, the hexadecimal data in the device
specified by S is divided into the high 8-bit data and the low 8-bit data. The CRC is applied to
every byte, and the operation result is stored in the high 8-bit and the low 8-bit in the device
specified by D. The number of bytes depends on n.
4. The 8-bit conversion mode: When SM606 is ON, the hexadecimal data in the device specified
by S is divided into the high 8-bit data (invalid data) and the low 8-bit data. The CRC is applied
to every byte, and the operation result is stored in the low 8-bit in the two registers. The
number of bytes depends on n.
Example:
1. The PLC is connected to the VFD-S series AC motor drive (RTU mode: SM210 is ON; 16-bit
mode: SM606 is ON.). The value 16#12, which will be written into the device at 16#2000 in the
VFD-S series AC motor drive, is written into the device in the PLC first.
PLCVFD-S
The PLC sends 01 06 2000 0012 02 07.

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