NOTE: Frame grabbers have the ability to control the differential input (CC1+, CC1-) or
(INPUT1+, INPUT1-) of the camera. This is facilitated by connecting them via two wires within
the camera-framegrabber interface cable to differential frame grabber outputs that are driven by a
General Purpose register bit that is to be controlled by host software. The TTL input (VRST_INT)
is usually NOT connected via the camera-framegrabber interface cable. Therefore, in most
applications, the VRST_INT signal floats HIGH - enabling resets from the framegrabber (under
control of the host software). In some cases, however, users may want to feed a TTL reset signal
directly to the camera, e.g. from an optical detector in an inspection application. In this case, the
user must ensure that the differential input (INPUT1 or CC1) is either driven HIGH or allowed to
float HIGH.
Within the camera, these two signals are logically AND-ed together and the resulting RESET
signal is used to reset the counters within the camera-timing chip. If either the TTL (VRST_INT
signal) or the differential (INPUT1 or CC1) is unused it floats HIGH due to internal pull-ups. The
other signal may be pulled "LOW" to cause a reset to the camera.
In cameras that have an auxiliary input connection, the VRST_INT (TTL) input is available as one
of the pins. In some applications, this input can be used to reset the camera directly instead of
generating resets from the frame grabber.
In the LVDS version, these inputs are called VRST_INT (TTL-pin39 of the DB44 connector) and
INPUT1(differential LVDS-pins [34,35] of the DB-44 connector). The default level for both these
signals is logic "HIGH".
In the CameraLink version, based on the CameraLink specifications, the CC1 signal allows the
CameraLink compliant PCI board to reset the camera under software control. In addition, a 6-pin-
mini-DIN auxiliary connector is provided, that includes a TTL reset input called VRST_INT.
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