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Epson RX4111CE - AC Characteristics (2); Interface Timing When Power on; off; Restrictions of SPI-Bus Interface in the Power on; off; Table 8 FOUT Symmetry

Epson RX4111CE
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10. Interface timing when power ON / OFF
RX4111CE Jump to Top / Bottom
ETM62E-02 Seiko Epson Corporation 13
9.2.2. AC Characteristics 
Table 8 FOUT symmetry
Unless otherwise specifiedGND=0 V , V
IO
= 1.6 V 5.5 V , Ta= -40 C +85 C
Item
Symbol
Condition
Min.
Typ.
Max.
Unit
FOUT symmetry
SYM
50 % V
IO
Level
40
60
%
 
10.1. Restrictions of SPI-Bus interface in the power ON / OFF.
t
R1
is needed for a proper power-on reset. If this power-on condition cannot be kept, it is necessary to reset the device by means
of a software command.
After all power-OFF, keep VDD = VBAT = GND for more than 10 seconds for a proper power-on reset by cold start.
When cannot it, please initialize the RTC by software.
The backup period against this standard does not indicate the noise characteristics with respect to the power supply.
The backup period should be long enough (60 seconds or more).
V
DD
, V
BAT
*3
V
CLK
GND
Power supply V
DD
,V
BAT
t
R1
+V
DET
*1
Backup mode
t
CL
*2
t
CU
-V
DET
+V
DET
SPI
Access is enabled
V
BAT
Access is disabled
V
DD
Access is
enabled
Figure 14 Power on Sequence
Table 9 Power up down characteristics
Item
Symbol
Condition
Min.
Typ.
Max.
Unit
Initial power supply rise
time
t
R1
From GND to V
DD
= +V
DET1
5 V
0.1
-
10
ms / V
3 V
0.5
-
10
ms / V
Access wait time
(Initial power on)
t
CL
After arrival to V
DD
= 1.6 V
30
-
-
ms
Backup switchover start
wait time
t
CD
After the access end
0
-
-
ms
Power supply fall time
t
F
From V
DD
to V
DD
= -V
DET1
1
-
-
ms / V
Power supply rise time
(Recovery from Backup)
t
R2
Recovery to the operating voltage
0.1
-
-
ms / V
Access wait time
(Recovery from Backup)
t
CU
The time from Recovery from
Backup to access start
40
-
-
ms
1 Power-on reset is performed at the rising edge of V
BAT
or V
DD
.
2 Since the V
DD
voltage monitoring (+V
DET1
) during backup is intermittent operation (31.25 ms) , a delay occurs after V
DD
reaches
+V
DET1
until the power supply switches.
*3 For internal initialization, the V
DD
voltage at the initial power-on must be increased to 1.6 V or more.

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