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Epson RX4111CE - Status Monitoring Function; Related Registers for Status Monitoring; Table 38 RTC Status Monitor Register; Table 39 por Bit (Power on Reset)

Epson RX4111CE
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14. How to use
RX4111CE Jump to Top / Bottom
ETM62E-02 Seiko Epson Corporation 37
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14.5. Status Monitoring Function
It is a flag bit that detects the state of this product and holds the result. 3 kinds of status changes.
- Power ON Reset
- VLF bit is set
- XST bit is set.
14.5.1. Related Registers For Status Monitoring.
Table 38 RTC Status Monitor Register
Address[h]
Function
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Bank1 - E
Flag Register
POR
z
UF
TF
AF
EVF
VLF
XST
1) POR bit
Detects Power-on Reset (POR) occurred.
Table 39 POR bit (Power ON Reset)
POR
Data
Description
Write
0
Clear for next detection.
1
Ignored.
Read
0
POR was not detected.
1
POR was detected.
(The result is retained until this bit is cleared to zero.)
The default value of the register is set by power-on reset.
2) VLF bit
VLF are set from POR or XST.
Table 40 VLF bit (Voltage Low Flag)
VLF
Data
Description
Write
0
Clear for the next detection.
1
Ignored
Read
0
VLF was not detected.
1
POR or XST was detected.
(The result is retained until this bit is cleared to zero.)
It is used for judgment of initialization of an RTC.
3) XST bit
When an oscillation of crystal is stopped, it is set.
Table 41 XST bit (Crystal Oscillation Stop)
XST
Data
Description
Write
0
Clear for the next detection.
1
Ignored.
Read
0
XST was not detected.
1
Crystal oscillation stop was detected.
(The result is retained until this bit is cleared to zero.)
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