ECM-3610/3610L
ECM-3610/3610L User’s Manual 7
TwisterT supports a 32-bit 3.3 / 5V system bus (PCI) that is synchronous / pseudo-
synchronous to the CPU bus. The chip also contains a built-in bus-to-bus bridge to allow
simultaneous concurrent operations on each bus. Five levels (doublewords) of post write
buffers are included to allow for concurrent CPU and PCI operation. For PCI master
operation, forty-eight levels (doublewords) of post write buffers and sixteen levels
(doublewords) of prefetch buffers are included for concurrent PCI bus and DRAM/cache
accesses. The chip also supports enhanced PCI bus commands such as Memory-Read-
Line, Memory-Read-Multiple and Memory-Write-Invalid commands to minimize snoop
overhead. In addition, advanced features are supported such as snoop ahead, snoop
filtering, L1 write-back forward to PCI master, and L1 write-back merged with PCI post
writes buffers to minimize
PCI master read latency and DRAM utilization. Delay transaction and read caching
mechanisms are also implemented for further improvement of overall system performance.
TwisterT also integrates S3.’s Savage4 graphics accelerator into a single chip. TwisterT
brings mainstream graphics performance to the Value PC with leading-edge 2D, 3D and
DVD video acceleration into a cost effective package. Based on its capabilities, TwisterT
is an ideal solution for the consumer, corporate mobile users and entry-level professionals.
The industry’s first integrated AGP 4X solution, TwisterT combines AGP 4X performance
with S3’s DX6 texture compression (S3TC) and massive 2Kx2K textures to deliver
unprecedented 3D performance and image quality for the Value PC mobile market.
For sophisticated power management, TwisterT provides independent clock stop control
for the CPU / SDRAM and PCI and Dynamic CKE control for powering down of the
SDRAM. A separate suspend-well plane is implemented for the SDRAM control signals for
Suspend-to-DRAM operation.
2.3.2.1 High-Performance 3D Accelerator
Featuring a new super-pipelined 128-bit engine, TwisterT utilizes a single cycle
architecture that provides high performance along with superior image quality. Several
new features enhance the 3D architecture, including single-pass multitexturing,
anisotropic filtering, and an 8-bit stencil buffer. TwisterT also offers the industry’s only
simultaneous usage of single-pass multitexturing and single-cycle trilinear filtering –
enabling stunning image quality without performance loss. TwisterT further enhances
image quality with true 32-bit color rendering throughout the 3D pipeline to produce more
vivid and realistic images. TwisterT’s advanced triangle setup engine provides industry
leading 3D performance for a realistic user experience in games and other interactive 3D
applications. The 3D engine is optimized for AGP texturing from system memory.
2.3.2.2 128-bit 2D Graphics Engine
TwisterT’s advanced 128-bit 2D graphics engine delivers high-speed 2D acceleration for
productivity applications. Several enhancements have been made to the 2D architecture
to optimize SMA performance and to provide acceleration in all color depths.
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