ECM-3610/3610L
ECM-3610/3610L User’s Manual 13
2.3.4 Realtek RTL8139C Ethernet Controller
The Ethernet interfaces are based on two Realtek RTL8139C Ethernet controllers which
support both 100Mbit as well as 10Mbit Base-T interface.
The Ethernet controllers are attached to the PCI bus and use PCI bus mastering for data
transfer. The CPU is thereby not loaded during the actual data transfer.
The Realtek RTL8139C is a highly integrated and cost-effective single-chip Fast Ethernet
controller that provides 32-bit performance, PCI bus master capability, and full compliance
with IEEE 802.3u 100Base-T specifications and IEEE 802.3x Full Duplex Flow Control. It
also supports Advanced Configuration Power management Interface (ACPI), PCI power
management for modern operating systems that is capable of Operating System Directed
Power Management (OSPM) to achieve the most efficient power management.
2.3.5 Intel 82559ER Ethernet Controller (Optional)
The 82559ER is part of Intel's second generation family of fully integrated 10BASE-
T/100BASE-TX LAN solutions. The 82559ER consists of both the Media Access
Controller (MAC) and the physical layer (PHY) combined into a single component solution.
82559 family members build on the basic functionality of the 82558 and contain power
management enhancements.
The 82559ER is a 32-bit PCI controller that features enhanced scatter-gather bus
mastering capabilities which enables the 82559ER to perform high-speed data transfers
over the PCI bus. The 82559ER bus master capabilities enable the component to process
high-level commands and perform multiple operations, thereby off-loading communication
tasks from the system CPU. Two large transmit and receive FIFOs of 3 Kbytes each help
prevent data underruns and overruns, allowing the 82559ER to transmit data with
minimum interframe spacing (IFS).
The 82559ER can operate in either full duplex or half duplex mode. In full duplex mode
the 82559ER adheres to the IEEE 802.3x Flow Control specification. Half duplex
performance is enhanced by a proprietary collision reduction mechanism.
The 82559ER includes a simple PHY interface to the wire transformer at rates of 10BASE-
T and 100BASE-TX, and Auto-Negotiation capability for speed, duplex, and flow control.
These features and others reduce cost, real estate, and design complexity.
The 82559ER also includes an interface to a serial (4-pin) EEPROM and a parallel
interface to a 128 Kbyte Flash memory. The EEPROM provides power-on initialization for
hardware and software configuration parameters
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