FlexGain PLEX - Page 19

User’s manual FlexGain Plex, V2
Version 1.3 19 from 99
Cross-connect
matrix
DSP
Input
mixer
Output
mixer
V.35 framer
Interface of
daughter board 1
Interface of
daughter board 2
V.35 port
Daughter
board 1
Daughter
board 2
15.1
15.2
15.3
15.4
17.1
17.2
17.3
17.4
Ethernet framer Ethernet port
FLASH
RAM
RS 232/TTL
terminal port
RS 485 interface
Alarm relays
Alarm relay switch
Display unit
Reference
Clock
shaper
Internal clock
2 048 kHz
DC – DC
converter
-38 ... -72 V +5 V
AC – DC
converter
~220+/-10% -48 V
DC – DC
converter
-38 ... -72 V +3,3 V
DC – DC
converter
-38 ... -72 V +12 V
Output
Framer
PCM1
CRC4
Block
CRC4
Block
Input
Framer
PCM1
Management bus
Management bus
Input from
external clock
2048 kHz
Output PCM1
E1 G.703
2 048 kbit/s
Input PCM1
E1 G.703
2 048 kbit/s
Interface of the
RINGER
daughter board
RINGER daughter
board
Data transmission
Clocking
ARM
CPU
On-line clock
15.1 - 15.4 - analogue interfaces
17.1 - 17.4 - analogue interfaces
1
2
4
3
5
6
22
21
27
28
23 24
25 26
7
18 19
20
29
89
10
11
12 13
14 15
16 17
35
36
30
31
32
33
34
Network
filter
Network
filter
37
39
Network
filter
Network
filter
38
40
Output
Framer
PCM2
CRC4
Block
CRC4
Block
Input
Framer
PCM2
41
42
Output PCM2
E1 G.703
2 048 kbit/s
Input PCM2
E1 G.703
2 048 kbit/s
FG-Plex-E1 Board
Figure 3. Structural scheme of FlexGain Plex, V2.