GW Instek PSW Series - Page 73

REMOTE CONTROL
73
QUES (Questionable Status
Register)
The summary bit for the
Questionable Status Register
group.
3 8
MAV (Message Available) This is
set when there is data in the
Output Queue waiting to be read.
4 16
(ESB) Event Summary Bit. The
ESB is the summary bit for the
Standard Event Status Register
group.
5 32
MSS/RQS Bit
The MSS Bit is the summary of
the Status Byte Register and
Service Request register (bits 1-5,
7). This will be set to 1. The MSS
Bit is not cleared with a Serial
Poll.
The RQS Bit is set when the
instrument receives a Service
Request. A serial poll is then
performed and the contents of
the Status Byte Register is sent
with the RQS bit set as 1. The
RQS bit is cleared after the serial
poll, ready for the next Service
Request.
6 64
OPER (Operation Status Register)
OPER bit is the summary bit for
the Operation Status Register
Group.
7 128