Function and Feature Description
Supports automatic loopback release at the port.
Clock Supports synchronous Ethernet.
Supports SSM protocol.
Supports IEEE 1588V2 protocol.
Supports 1588 ACR clock.
5.5.3 Working Principle and Signal Flow
AND1EX1 mainly consists of the service access module, service processing module,
management module, clock module, and power supply module
Figure 5-9 shows the block diagram for the functions of the AND1EX1.
Figure 5-9 Block diagram for the functions of the AND1EX1
CXP
Service access
module
Clock
module
Service
processing
module
Management
module
1 x 10GE signal Service signals
Management bus
-48V/-60V
-48V/-60V
1.8V
Power
supply
module
Back plane
Clock signals
CXP
CXP
3.3V
Each module on the board
5.0V
1.2V
Service signals
Management bus
Management bus
Clock signals
System power
supply
System power
supply
Transmit Direction
The service packets from AND1CXPA/AND1CXPB are sent to the service processing module
through the backplane-side interface of the EX1. The service processing module buffers and
schedules the packets. Then, the service processing module sends the processed packets to the
service access module, where coding/decoding, and serial/parallel conversion are performed.
Finally, the service access module outputs the packets through the 10 GE interface on the front
panel.
Receive Direction
The 10 GE interface on the front panel receives 10 GE service signals. Then, the service access
module performs serial/parallel conversion, and coding/decoding on the services, and then sends
the services to the service processing module. The service processing module buffers and
ATN 950B Multi-service Access Equipment
Hardware Description 5 Physical Interface Card
Issue 03 (2012-07-23) Huawei Proprietary and Confidential
Copyright © Huawei Technologies Co., Ltd.
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