module decapsulates the concatenated services and buffers the services in queues. Then, this
module schedules the egress queues according to the service types, processes and converts the
services, and finally sends the services to the line-side processing module. The line-side
processing module performs coding, dejitter, pulse shaping, and line driving for the services,
and finally sends the services to E1 interfaces.
In Receive Direction
The line processing module performs impedance match, signal equalization, signal level
conversion, clock data recovery, dejitter, and decoding for the accessed E1 signals. Then, the
signals are sent into the system-side processing module, which frames the signals, encapsulates
the IMA, CES, and ML-PPP services in PWE3, and schedules PWs. Finally, this module sends
the signals in Ethernet packets to the backplane interface module.
Line-Side Processing Module
In the receive channel, this module performs impedance match, signal equalization, electrical
level conversion, clock data recovery, dejitter, and decoding to signals. In the transmit channel,
this module performs encoding, dejitter, pulse shaping, and line driving to signals.
System-Side Processing Module
This module frames 16 x E1 signals, runs the CES, IMA, and ML-PPP protocols, and performs
PWE3 encapsulation.
Backplane Interface Module
The service bus receives or transmits service signals.
Control Module
This module controls the reading and writing on the chip, resets the chip, and detects faults in
the chip.When used with the AND1CXPA/AND1CXPB, this module controls the board.
Clock Module
This module provides various clock signals for the board to operate normally, detects clocks,
and selects the line recovery clock.
Power Supply Module
This module converts the -48 V DC/-60 V DC voltage to DC voltages required by each module
on the board.
5.6.4 Front Panel
On the front panel of the AND1ML1/AND1ML1A, there are indicators and interfaces.
Appearance of the Front Panel
Figure 5-12 shows the appearance of the front panel of the AND1ML1.
ATN 950B Multi-service Access Equipment
Hardware Description 5 Physical Interface Card
Issue 03 (2012-07-23) Huawei Proprietary and Confidential
Copyright © Huawei Technologies Co., Ltd.
64
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