BIOS Architecture Intel® Server Board SE7520BD2 Technical Product Specification
34 Revision 1.3
ID Feature Name Comments
Support for serial on LAN (SOL) Supported by Sahalee BMC
Support for FRU LEDs
Support for FRB-1/2/3
Support for EFI -32 EFI Rev. 1.1
Support for memory DDR266/333
memory re-map
memory Intel single device data
correction (SDDC). Only for memory
dual channel mode
Max memory size:
24GB for DDR266
16GB for DDR333
memory mirror:
Dual channel only
memory spare:
Dual & single channel
mixing of DDR333 & DDR266:
DDR333 is treated as DDR266.
Support for CPU hyper-threading:
Enable/disable by BIOS setup
CPU Micro code update during POST
CPU Micro code update during
runtime:
POST & runtime (Int 15h, AX=
0D042h)
Allow variable size microcode update
(The maximum size of a microcode is
16KB)
Support for BBS BBS Rev. 1.02
Support for PCI PCI-X
PCI-X DDR
PCI-E
Support for MPS (APIC mode) MPS 1.4 (MPS table)
Support for PIC mode PCI IRQ routing table
Support for ACPI (a) ACPI 2.0
(b) S0/S1/S4/S5
(c) ACPI SPCR (serial port console
redirection) table
Support for SMBIOS SMBIOS 2.3.1
Below 1 MB in memory
Support for KB and MS swap AMI firmware
No support for parallel port Not supported by NS* PC87427
BIOS warning messages in English assuming video is
available instead of beep codes
Multi-language English/French/Spanish/Italian/
German