Platform Management ArchitectureIntel® Server Board SE7520BD2 Technical Product Specification
82 Revision 1.3
Sensor Name
Sensor
Number
Sensor Type
Event /
Reading
Type
Event Offset
Triggers
Assert /
Deassert
Readable
Value /
Offsets
EventData
Rearm
Standby
SMI Signal State 88h
OEM
C0h
Digital
Discrete
03h
State Asserted
State Deasserted
– – – – –
DIMM Sparing
Redundancy
89h
Availability Status
0Bh
Discrete
0Bh
Fully Redundant
Non-red:Suff res
from redund
Non-red:Suff res
from insuff res
Non-red:Insuff res
As – Trig Offset A –
DIMM Sparing
Enabled
8Ah
Entity Presence
25h
Sensor
Specific
6Fh
Entity Present As – Trig Offset A –
Memory Mirroring
Redundancy
8Bh
Availability Status
0Bh
Discrete
0Bh
Fully Redundant
Non-red:Suff res
from redund
Non-red:Suff res
from insuff res
Non-red:Insuff res
As – Trig Offset A –
Memory Mirroring
Enabled
8Ch
Entity Presence
25h
Sensor
Specific
6Fh
Entity Present As – Trig Offset A –
Processor 1 Status 90h
Processor
07h
Sensor
Specific
6Fh
IERR
Thermal Trip
FRB1, FRB2, FRB3
Config Error
Presence
Disabled
As & De – Trig Offset M X
Processor 2 Status 91h
Processor
07h
Sensor
Specific
6Fh
IERR
Thermal Trip
FRB1, FRB2, FRB3
Config Error
Presence
Disabled
As & De – Trig Offset M X
Processor 1 Core
Temp
98h
Temp
01h
Threshold
01h
[u,l][nr,c,nc] As & De Analog R, T A –
Processor 2 Core
Temp
99h
Temp
01h
Threshold
01h
[u,l][nr,c,nc] As & De Analog R, T A –
Processor 1 12v
VRM
B8h
Voltage
02h
Threshold
01h
[u,l][ nr,c,nc] As & De Analog R, T A –
Processor 2 12v
VRM
B9h
Voltage
02h
Threshold
01h
[u,l][ nr,c,nc] As & De Analog R, T A –
Processor 1 Fan A8h
Fan
04h
Threshold
01h
[u,l][ nr, c,nc] As & De Analog R, T M –
Processor 2 Fan A9h
Fan
04h
Threshold
01h
[u,l][ nr, c,nc] As & De Analog R, T M –