Table 23: CTP Bundle Transparent Encoding Parameter Settings in CTPView (continued)
Your ActionFunctionField
Select one:
•
TRANS - Master End—This end of the
circuit generates a clock signal and
sends it to the remote end. Configure
TRANS - Slave End at the remote end.
•
TRANS - Slave End—This end of the
circuit uses adaptive clocking to receive
the clock signal from the remote end.
The clock slave uses its period to
determine when to sample data and
how to transmit data across the link. If
you specify TRANS - Slave End, the
adaptive clocking configuration
appears. See “Configuring Adaptive
Clocking for CTP Bundles (CTPView)”
on page 115.
•
Custom—The custom clocking
configuration is used. See “Configuring
Custom Clocking for CTP Bundles
(CTPView)” on page 109.
Specifies the clocking method used for
the transparent circuit.
To prevent errors in transport, both ends
of a circuit must be synchronized with
each other. You can accomplish this by
either locking each end of the circuit to
a common reference or by enabling
adaptive clocking at one end of a circuit.
Clock Cfg
Select one:
•
DISABLED
•
ENABLED
Enables or disables the phase correction
FIFO buffer. This FIFO buffer aligns the
clock and data phase relationship on a
TRANS encoded circuit in which the
clock travels in one direction and the
data travels in the opposite direction.
Enable this FIFO buffer at one end of the
circuit, but not at both ends.
16-Bit Jitter Absorption FIFO
Select one:
•
DISABLED
•
ENABLED
Specifies whether or not to invert the
FIFO buffer write clock.
Invert FIFO Write Clock
Select one:
•
DISABLED
•
ENABLED
Specifies whether or not to invert the
FIFO read clock.
Invert FIFO Read Clock
59Copyright © 2018, Juniper Networks, Inc.
Chapter 2: Configuring CTP Bundles