Model 6487 Reference Manual Limit Tests and Digital I/O 8-3
The 2-stage limit testing process is shown in . If Limit 1 fails, the L1 message is displayed
and the test is finished. Limit 2 is not tested because the pass band relationship between
the two stages implies that if Limit 1 fails, Limit 2 must also fail. If Limit 1 passes, the
Limit 2 test is performed. If Limit 2 fails, the L2 message is displayed. If both Limit 1 and
Limit 2 pass, the OK message is displayed. The display messages for limit tests are sum-
marized in Table 8-1.
klqb When limit tests are enabled, the voltage source value display is not visible, but
it can still be viewed by using the CONFIG V-SOURCE menu or by pressing the
V-SOURCE up or down arrow keys.
A test is only performed if it is enabled. Therefore, you can perform a single-stage test or a
2-stage test. In the flowchart (), operation simply proceeds through a disabled test.
Table 8-1
Test limit display messages
Display
Message
Limit 1
Test Result
Limit 2
Test Result
:OK Pass Pass
:L1 Fail Not Performed
:L2 Pass Fail
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