Section 3: Test subroutine library reference S530 Parametric Test System Test Subroutine Library User's Manual
3-62 S530-907-01 Rev. A / September 2015
vbes
This subroutine measures base-emitter voltage of a bipolar transistor.
Usage
double vbes(int e, int b, int c, int sub, double ipgm, char type)
The emitter pin of the device
The base pin of the device
The collector pin of the device
The substrate pin of the device
The forced current, in amperes
Type of transistor: "N" or "P"
-1.0 = Type not specified as "N" or "P"
+2.0E+21 = Voltage limit reached; measured voltage is within 98 % of
the 3 V limit
Details
For a PNP transistor, this subroutine measures the base-emitter voltage at a specified emitter current
with the base and collector terminals tied to ground.
For an NPN transistor, this subroutine measures the emitter-base voltage at a specified base current
with the emitter and collector terminals tied to ground.
If a positive substrate pin is specified, the substrate is grounded. If a positive substrate pin is not
specified, the substrate is left floating.
A delay is incorporated into the vbes subroutine; this delay is calculated time required for stable
forcing of ipgm with a 3 V voltage limit.
V/I polarities
The polarity of ipgm is determined by device type.
Source-measure units (SMUs)
SMU1: Forces ipgm, 3 V voltage limit, measures vbes