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LSIS XGL-EFMTB - Appendix; XGT CPU Memory Device List; Device of XGK CPU

LSIS XGL-EFMTB
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Appendix
A-1
Appendix
A.1 XGT CPU Memory Device List
For up-to-date device list of each CPU, refer to relevant CPU user manual. The following contents are
based on when this user manual is written.
A.1.1 Device of XGK CPU
It is the memory addresses of CPU for the data send/receive.
Device type Range Size(Word) Read/Write
P P0 - P2047 2048
R/W
M M0 - M2047 2048
R/W
K K0 - K2047 2048
R/W
F F0 - F1023 1024
R
F F1024 - F2047 1024
R/W
T T0 - T2047 2048
R/W
C C0 - C2047 2048
R/W
U U00.00 - U7F.31 4096
R/W
Z Z0 - Z127 128
R/W
L L0 - L11263 11264
R/W
N N0 - N21503 21504
R/W
D(CPUH) D0 - D32767 32768
R/W
D(CPUS) D0 - D19999 20000
R/W
R R0 - R32767 32768
R/W
ZR ZR0 -ZR65535 65536
R/W

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