Bus Extender Unit Module IOP371
Metso Automation MAX Controls Inc. • 277596 •
11-5
BEM Operation
Each Extender module is packaged in a Model IOP I/O style printed circuit
board. Each board contains a chipset that includes a transmitter, receiver and
an optical transceiver. The transmitter converts the parallel data into serial
data, appends encoded error checking bits and sends the data serially over a
very fast fiber optic link (160 MBaud). The receiver decodes the serial data,
does error checking and converts the data back to the original parallel form.
The Extender also includes the buffers/darlingtons associated with the
Model IOP bus, bosfet switches to disconnect the backup DPU Extender
from the bus, and a CPLD to provide some small additional logic required to
support the operation of the chip set. The MACK condition (multiple
modules on the bus) is detected by the remote Extender transmitted over the
link and simulated locally for interpretation by the DPU.
Figure 10-3 shows a functional block diagram of the Bus Extender Module.
Operation is as follows:
I/O Bus Interface – Buffers to duplicate both the DPU and I/O module bus
interface. The ACK signal from the module is detected at the remote end
transmitted by the link and simulated at the DPU end.
CPLD –provides all the logic resources required by the link. This includes
latching and synchronizing the bus data to the frame clock, error detection
and link failover.
Transmitter (Serializer) – Converts a snapshot of the parallel bus data into
160Mb TTL level serial stream.
Receiver (Serializer) – Converts the received TTL level serial stream into
parallel data.
Frame Clock – 8 MHz clock initiates the serial conversion of the I/O bus
data. Thus a snapshot of the Model IOP bus is sent every 125 nsecs. This
corresponds to a serial speed of 160Mb of the optical transceivers.
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