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NAiS FP1

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6-1. Configuration of High-level Instructions
1. Types of High-level Instructions
• In the FP1 Control Unit, the following high-level instructions are available:
Data Transfer Instructions:
These instructions copy or exchange the 16-bit or 32-bit data.
BIN Arithmetic Instructions:
These instructions add, subtract, multiply, or divide the 16-bit or 32-bit data.
BCD Arithmetic Instructions:
These instructions add, subtract, multiply, or divide the BCD data.
Data Comparison Instructions:
These instructions compare the 16-bit or 32-bit data.
Logic Operation Instructions:
These instructions perform the logic operations (AND, OR, Exclusive OR, Exclusive NOR).
Data Conversion Instructions:
These instructions convert the 16-bit or 32-bit data to the specific format.
Data Shift Instructions:
These instructions shift the data in units of words or of hexadecimal digits.
Up/Down Counter and Left/Right Shift Register Instructions:
These are the up/down counter and left/right shift register instructions.
Data Rotate Instructions:
These instructions rotate the data to right or left.
Bit Manipulation Instructions:
These instructions handle the data in units of bits.
Auxiliary Timer Instruction:
This is the auxiliary timer instruction (0.01 s unit ON-delay timer).
Special Instructions:
These instructions perform the special functions to control FP1 operation.
High-speed Counter Special Instructions:
These instructions perform the special high-speed counter functions.
2. Configuration of High-level Instructions
X0
(MV)
Trigger
Timing
chart
Executed in
every scan
• The high-level instructions are expressed as high-
level instruction numbers, boolean and operands.
• The high-level instruction numbers (F0 to F165) are
used for inputting high-level instructions.
• The high-level instructions should be programmed
with the trigger.
• Note that the number and the type of operands
[source (S) and destination (D)] specified in the high-
level instruction depend upon the instruction. Refer to
each high-level instruction for details.
144
6-1. Configuration of High-level Instructions

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