NAiS FP1 User Manual

Outline Divides the 32-bit data by the divisor and stores the result in the specified
area and the remainder in special data registers DT9016 and DT9015.
Program example
■ Operands
■ Explanation of example
• Divides the contents of data registers DT201 and DT200 by the contents of data registers DT101 and DT100 when
trigger X0 turns ON. The quotient is stored in data registers DT1 and DT0 and the remainder is stored in special
data registers DT9016 and DT9015.
Bit position
DT101
0000
0000
11 8
0000
1001
30
Divisor [S2+1, S2]: K589828
15 ••12 •• ••
74
••
Bit position
DT1
0000
0000
11 8
0000
0000
30
Quotient [D+1, D]: K28
15 ••12 •• ••
74
••
Bit position
DT100
0000
0000
11 8
0000
0100
30
15 ••12 •• ••
74
••
Bit position
DT0
0000
0000
11 8
0001
1100
30
15 ••12 •• ••
74
••
# # # # # # # # # # # # # # # # # # #
higher 16-bit area
# # # # # # # # # # # # # # # # # # #
higher 16-bit area
# # # # # # # # # # # # # # # # # # #
lower 16-bit area
# # # # # # # # # # # # # # # # # # #
lower 16-bit area
Bit position
DT201
0000
0001
11 8
0000
0010
30
Dividend [S1+1, S1]: K16908416
15 ••12 •• ••
74
••
Bit position
DT200
0000
0000
11 8
1000
0000
30
15 ••12 •• ••
74
••
# # # # # # # # # # # # # # # # # # #
higher 16-bit area
# # # # # # # # # # # # # # # # # # #
lower 16-bit area
Bit position
DT9016
0000
0000
11 8
0000
0110
30
Remainder: K393232
15 ••12 •• ••
74
••
Bit position
DT9015
0000
0000
11 8
0001
0000
30
15 ••12 •• ••
74
••
# # # # # # # # # # # # # # # # # # #
higher 16-bit area
# # # # # # # # # # # # # # # # # # #
lower 16-bit area
–
X0: ON
Timer/Counter
EV
Relay
SVWRWYWX
Operand
S1
AAA A
A:
N/A: Not Available
Register
DT
A
IYIX
A N/A
HK
AA
Constant
Index
modifier
A
Index
register
Available
A
S2
A A A A A A N/A A A AA
N/A A A A A A N/A N/A N/A AA
D
6-3. Description of High-level Instructions
F33
(D%)
32-bit data [(S1+1, S1)/(S2+1, S2)
→ (D+1, D) ... (DT9016, DT9015)]
32-bit equivalent constant or lower 16-bit area of 32-bit data (for dividend)
32-bit equivalent constant or lower 16-bit area of 32-bit data (for divisor)
Lower 16-bit area of 32-bit data (for quotient)
(remainder is stored in special data registers DT9016 and DT9015)
Ladder Diagram
Boolean Non-ladder
Address Instruction
20
X0
F33 D% , DT 200 , DT 100 , DT 0
D
Trigger
S2S1
20
21
ST X 0
F 33 (D% )
DT 200
DT 100
DT 0
S1
S2
D
Availability
Step
11
C24, C40, C56,
and C72 series
179

NAiS FP1 Specifications

General

Brand	NAiS
Model	FP1
Category	Controller
Language	English