A
A-3 Inner Workings of CP1L
SYSMAC CP1L Getting Started Guide 105
Appendix
A-3 Inner Workings of CP1L
This section briefly explains the inner structure, functions, and internal operation flow of CP1L CPU units.
A-3-1 Inner Structure of CPU Units
The inner structure of a CP1L CPU unit is shown below.
(1) Transfer of programs and parameter data
• Data in RAM is automatically backed up to the built-in flash memory when
changes are made, for example, from the CX-Programmer.
• When the unit is powered ON, data is transferred from the built-in flash
memory to RAM.
(2) Transfer of DM defaults data
• When initiated from CX-Programmer, DM defaults are transferred from RAM
to the built-in flash memory.
• According to PLC setup, DM defaults are transferred from the built-in flash
memory to RAM when the unit is powered ON.
(3) Transfer of data between flash memory and memory cassette
• When initiated from CX-Programmer, data is transferred from RAM or the
built-in flash memory to the memory cassette.
• When the unit is powered ON, data is transferred from the memory cassette to
the built-in flash memory.
CP U unit
Flash memory
Parameters
(i.e. PLC settings)
Access
I/O
memory
Built-in outputs
Analog adjuster
External analog
settings input
Auxiliary area
RAM
DM area
User program
FB program
memory
Comment
memory
User program
DM area
Parameters
(i.e. PLC settings)
Built-in inputs
Memory cassette
"Write" operation from
CX-Programmer
1
2
3
4
5
6
7
8
1
3
3
3
3
W07E-EN-02+CP1L+GettingStartedGuide.book Seite 105 Montag, 15. September 2008 11:15 11
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