EasyManuals Logo

Quectel 5G Series Hardware Design

Quectel 5G Series
86 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #53 background imageLoading...
Page #53 background image
5G Module Series
RM500Q-GL Hardware Design
RM500Q-GL_Hardware_Design 52 / 85
The module operation status indicated by WAKE_ON_WAN# is shown as below.
Table 24: State of WAKE_ON_WAN#
Host Module
WAKE_ON_WAN#
BB
GPIO
23
VCC_IO_HOST
Wake up the host
1s
H
L
R1
10k
NOTE: The voltage level on VCC_IO_HOST depends on the host side due to the open drain in pin 23.
Figure 26: WAKE_ON_WAN# Signal Reference Circuit
4.5.5. DPR*
RM500Q-GL provides a DPR (Dynamic Power Reduction) pin for body SAR (Specific Absorption Rate)
detection. The signal is sent from the proximity sensor of a host system to RM500Q-GL module to provide
an input trigger, which will reduce the output power in radio transmission.
Table 25: Function of the DPR Signal
See document [4] for more details about the command AT+QCFG="sarcfg".
WAKE_ON_WAN# State
Module Operation Status
Output a one-second pulse signal at low level
Call/SMS/Data is incoming (to wake up the host)
Always at high voltage level
Idle/Sleep
DPR Level
Function
High/Floating
NO max. transmitting power backoff
Low
Max. transmitting power backoff by AT+QCFG="sarcfg"
NOTE

Table of Contents

Other manuals for Quectel 5G Series

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the Quectel 5G Series and is the answer not in the manual?

Quectel 5G Series Specifications

General IconGeneral
BrandQuectel
Model5G Series
CategoryControl Unit
LanguageEnglish

Related product manuals