Quectel 5G Series Hardware Design

5G Module Series
RM500Q-GL Hardware Design
RM500Q-GL_Hardware_Design 35 / 85
4 Application Interfaces
The physical connections and signal levels of RM500Q-GL comply with PCI Express M.2 specification.
This chapter mainly describes the definition and application of the following interfaces/pins of the module:
⚫ (U)SIM interfaces
⚫ USB interface
⚫ PCIe interface
⚫ PCM interface
⚫ Control and indication interfaces
⚫ Cellular/WLAN COEX interface*
⚫ Antenna tuner control interface*
⚫ Configuration pins
4.1. (U)SIM Interfaces
The (U)SIM interfaces circuitry meets ETSI and IMT-2000 requirements. Both Class B (3.0 V) and Class
C (1.8 V) (U)SIM cards are supported.
4.1.1. Pin Definition of (U)SIM
RM500Q-GL has two (U)SIM interfaces, and supports dual SIM single standby.
Table 14: Pin Definition of (U)SIM Interfaces
Pin No.
Pin Name
I/O
Description
DC Characteristics
36
USIM1_VDD
PO
Power supply for (U)SIM1 card
1.8/3.0 V
34
USIM1_DATA
DIO, PU
(U)SIM1 card data
USIM1_VDD
1.8/3.0 V
32
USIM1_CLK
DO, PD
(U)SIM1 card clock
USIM1_VDD
1.8/3.0 V
30
USIM1_RST
DO, PD
(U)SIM1 card reset
USIM1_VDD
1.8/3.0 V

Quectel 5G Series Specifications

General

Brand	Quectel
Model	5G Series
Category	Control Unit
Language	English