Chapter 5. Product Structure 5 - 25
Doppler Image Data Processing
RF Data generated by the BF Board is entered as FPGA Input.
The entered RF Data is converted into computable RF Data at the FPGA, and then
entered as the input for ASIC (MCB028A).
ASIC (MCB028A) receives RF Data input and processes through DTGC (Digital Time
Gain Compensation), Decimation, Quadrature Mixer, etc. to create I/Q data (In-phase &
Quadrature Data). I/Q Data is entered into FPGA again.
I/Q Data is processed at FPGA to generate Doppler Data and it is sent to DMA & RTC
Part. Detailed descriptions are as follows.
FPGA which received I/Q Data filters the data and filters CW I/Q Data from CW Board in
the same way to send the final Doppler Data to PC Part. PW and CW cannot be
processed simultaneously, therefore all operations are controlled by the internal control
process.
I/Q Data go through a Clutter Filter and are sent to a FFT (Fast Fourier Transform) circuit
for generating Doppler Spectrum, which isolates the basic elements of Doppler, i.e. power,
velocity, and variance, to generate Doppler Data. Then it is entered into DSP FPGA again
and sent to the DMA & RTC Part of BE Board.
Filtered I/Q Data from FPGA go through the Clutter filtering to remove the Wall Noise from
Doppler DSP and is processed with Hilbert transform. The direction of sound is removed
to generate Doppler Sound.
Color Image Data Processing
RF Data generated by the BF Board is entered as FPGA Input.
The entered RF Data is converted into computable RF Data at the ASIC (MCB028A), and
then entered as the input for ASIC (MCB028A).
ASIC (MCB028A) receives RF Data input and processes through DTGC (Digital Time
Gain Compensation), Decimation, Quadrature Mixer, etc. to create I/Q data (In-phase &
Quadrature Data). I/Q Data is entered into FPGA again.
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