Siemens S7-1200 - Page 415

Technology instructions
9.1 High-speed counter
S7-1200 Programmable controller
System Manual, 03/2014, A5E02486680-AG
415
HSC
counter mode
CPU on-board input
(default 0.x)
Optional SB input (default
4.x)
1
0
1
2
3
4
5
0
1
2
3
AB-phase
A
B
HSC 5
1-phase
C
[d]
[R]
2-phase
CU
CD
[R]
AB-phase
A
B
[R]
HSC 6
1-phase
[R]
C
[d]
2-phase
[R]
CU
CD
AB-phase
[R]
A
B
1
An SB with only 2 digital inputs provides only the 4.0 and 4.1 inputs.
Table 9- 8 CPU 1212C
:
HSC default address assignments
HSC counter mode
CPU on-board input
(default 0.x)
Optional
SB input
(default 4.x)
1
0
1
2
3
4
5
6
7
0
1
2
3
HSC 1
1-phase
C
[d]
[R]
C
[d]
[R]
2-phase
CU
CD
[R]
CU
CD
[R]
AB-phase
A
B
[R]
A
B
[R]
HSC 2
1-phase
[R]
C
[d]
[R]
C
[d]
2-phase
[R]
CU
CD
[R]
CU
CD
AB-phase
[R]
A
B
[R]
A
B
HSC 3 1-phase C [d] [R] C [d] [R]
2-phase
CU
CD
[R]
AB-phase
A
B
[R]
HSC 4
1-phase
[R]
C
[d]
C
[d]
[R]
2-phase
[R]
CU
CD
AB-phase
[R]
A
B
HSC 5 1-phase C [d] [R]
2-phase
CU
CD
[R]
AB-phase
A
B
[R]
HSC 6
1-phase
[R]
C
[d]
2-phase
[R]
CU
CD
AB-phase
[R]
A
B
1
An SB with only 2 digital inputs provides only the 4.0 and 4.1 inputs.