S5-115F Manual Configuring with COM 115F
• Max. PLC cycle time
Enter here the cycle time your PLC must on no account exceed ( Vol. 1, 10.4 of the Manual).
• Second error occurrence time
The second error occurrence time is prescribed by the licensing authority. It follows the
specifications made in the system-specific regulation for redundant systems.
The second error occurrence time is the time during which the occurrence of a second error in
the redundant system can be ignored.
• Calculated test block time
The complete selftest lasts some minutes and cannot be processed in one go. For this reason,
the PLC selftest is divided into several test slices. One or more test slices are processed in succes-
sion in each PLC cycle.
The test block time is not configured by the user but calculated autonomously by COM 115F. It
depends on the following:
- Number of Type 3 DI bits with 24 V input voltage
- Number of Type 3 DI bits with 220 V input voltage
- Number of Type 10 DQ bits
- Number of Type 14 and Type 15 AI channels.
The test component per PLC cycle is controlled using the test block time and the test cycle time.
When you first open the menu for initializing the 115F operating system, a default value
appears in the ”Calculated test block time” line. This value applies to the user EPROM specified
in the menu and a device configuration without I/O modules.
The test block time is calculated anew after every change:
- if ”User EPROM capacity” is re-initialized
or
- if I/O modules of the I/O types named above are configured.
• Test cycle time
For safety reasons, the complete PLC selftest must be run once per test cycle time (e.g. 8 hrs).
One or more test slices per PLC cycle are processed consecutively in cyclic mode.
The following conditions must be satisfied when defining the test cycle time:
Test cycle time second error occurrence time
Test cycle time 10
•
test block time
Note the different time units in the input form and use a common unit for checking the above
conditions.
The greater the test cycle time selected, the less will be the load on the operating system per
PLC cycle caused by the PLC selftest component.
Note
When defining the test cycle time, note that the ”calculated test block time” increases
with the number of I/O bits configured.
For this reason, check the validity of the condition ”Test cycle time 10
•
test block
time” after configuring the I/Os.
If the condition is not fulfilled, COM 115F displays the error message for illegal con-
figuration when transferring the configuration data.
EWA 4NEB 811 6149-02
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