•
Signal
DTACKL
BRL
VPAL
IPLOL
IPL1L
BERRL
EXTINTL
DBGL
Function
Data acknowledge
Bus request
Valid Peripheral Address
Interrupt Priority
Level
5
Interrupt
Priority
Level
2
Bus Error
External Interrupt
Data bus grab
OL Peripheral Input Signals
OL Peripheral Bi-directional Signals
•
Signal
0007
Signal
SPQSP3
VIN
VM12
VP12
GND
Miscellaneous
Function
Data
lines
Function
Select
peripheral °
to
3
9V
DC (nominal) - 500mA
maximum
-12V
+12V
ground
•
It
IS
not intended that the following description
of
the OL peripheral expansion mechanism
be sufficient
to
Implement an actual expansion device, but rather be read
to
gain a basic
understanding of the expansion mechanism.
Single or multiple peripherals may be added
to
the
OL
up
to
a maximum of
16
devices.
A single peripheral can be plugged drrectly into the OL Expansion Slot while multiple
peripherals must be plugged into the OL Expansion Module, which
in
turn
is
plugged
into the OL Expansion Slot via a buffer card.
In
this context the term device also inctudes expansion memory. Although the areas
of
the OL memory map allocated
to
expansion memory are different
from
those allocated
to
expansion devices, the basic mechanism
is
the same. Only one expansion memory
peripheral can be plugged into the OL
at
anyone
time.
The address space allocated
for peripheral expansion
In
the OL
Physical
memory map
allows
16
Kbytes per peripheral.
This area must contain the memory
mapped
1/0
requrred lor the driver and the code
for the driver
Itself
Odos includes facilities for queue management and Simple serial
1/0
which may be of
use when
Writing device drivers.
The position
ot
each peripheral device
In
the
overall
memory
map
of the OL
is
determined
by
the select peripheral lines:
SPO,
SP1,
SP2 and
SP3.
These select lines generate a
signal corresponding
to
the
slot
position
in
the
OL
expansion module, thus for a device
to
be selected the address input from address lines:
A14, A15,
A16
and
A17
must be
the same
as
the signals from
SPO,
SP1,
SP2 and SP3 respectively.
12/84
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