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5.0 System Resource
User’s Manual Page 5-7
WatchdogTimerConfigurationRegister1‐baseaddress+05h
Bit Name R/W Default Description
7 Reserved R 0 Reserved
6 WDTMOUT_STS R/W 0 Ifwatchdogtimeouteventoccurs,thisbitwillbesetto
1.Writea1tothisbitwillclearitto0.
5 WD_EN R/W 0 Ifthisbitissetto1,thecountingofwatchdogtimeis
enabled.
4 WD_PULSE R/W 0 Selectoutputmode(0:level,1:pulse)ofRSTOUT#by
settingthisbit.
3 WD_UNIT R/W 0 Selecttimeunit(0:1sec,1:60sec)ofwatchdogtimerby
settingthisbit.
2 WD_HACTIVE R/W 0 SelectoutputpolarityofRETOUT#(1:highactive,0:low
active)bysettingthebit.
10 WD_PSWIDTH R/W 0 SelectoutputpulsewidthofRSTOUT#
0:1ms1:25ms
2:125ms3:5sec
WatchdogTimerConfigurationRegister2‐baseaddress+06h
Bit Name R/W Default Description
70 WD_TIME R/W 0 Timeofwatchdogtimer
WatchdogPMEControlRegister‐baseaddress+0Ah
Bit Name R/W Default Description
7 WDT_PME R‐ ThePMEStatus
ThisbitwillsetwhenWDT_PME_ENissetandthe
watchdogtimeris1unitbeforetimeout(oftimeout)
6 WDT_PME_EN R/W 0 0:DisableWatchdogPME.
1:EnableWatchdogPME
51 Reserved ‐‐ ‐‐ Reserved
0 WDOUT_EN R/W 0 0:disableWatchdogtimeoutoutputviaWDTRST#
1:enableWatchdogtimeoutoutputviaWDTRST#

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