– 90 –
40 DVSS — Ground terminal (digital system)
41 XOE O Output enable signal output to the external D-RAM (IC124)
42 XCAS O Column address strobe signal output to the external D-RAM (IC124)
43 A09 O Address signal output to the external D-RAM (IC124)
44 XRAS O Row address strobe signal output to the external D-RAM (IC124)
45 XWE O Write enable signal output to the external D-RAM (IC124)
46 D1 I/O
47 D0 I/O
Two-way data bus for the external D-RAM (IC124)
48 D2 I/O
49 D3 I/O
50 MVCI I Digital in PLL oscillation input from the external VCO Not used (fixed at “L”)
51 ASYO O Playback EFM full-swing output
52 ASYI I (A) Playback EFM asymmetry comparator voltage input
53 AVDD — Power supply terminal (+3.3V) (analog system)
54 BIAS I (A) Playback EFM asymmetry circuit constant current input
55 RFI I (A) Playback EFM RF signal input from the CXA2523AR (IC101)
56 AVSS — Ground terminal (analog system)
57 PDO O (3)
58 PCO O (3) Phase comparison output for master clock of the recording/playback EFM master PLL
59 FILI I (A) Filter input for master clock of the recording/playback master PLL
60 FILO O (A) Filter output for master clock of the recording/playback master PLL
61 CLTV I (A) Internal VCO control voltage input of the recording/playback master PLL
62 PEAK I (A) Light amount signal (RF/ABCD) peak hold input from the CXA2523AR (IC101)
63 BOTM I (A) Light amount signal (RF/ABCD) bottom hold input from the CXA2523AR (IC101)
64 ABCD I (A) Light amount signal (ABCD) input from the CXA2523AR (IC101)
65 FE I (A) Focus error signal input from the CXA2523AR (IC101)
66 AUX1 I (A) Auxiliary signal (I3 signal/temperature signal) input from the CXA2523AR (IC101)
67 VC I (A) Middle point voltage (+1.65V) input from the CXA2523AR (IC101)
68 ADIO O (A) Monitor output of the A/D converter input signal Not used (open)
69 AVDD — Power supply terminal (+3.3V) (analog system)
70 ADRT I (A) A/D converter operational range upper limit voltage input terminal (fixed at “H” in this set)
71 ADRB I (A) A/D converter operational range lower limit voltage input terminal (fixed at “L” in this set)
72 AVSS — Ground terminal (analog system)
73 SE I (A) Sled error signal input from the CXA2523AR (IC101)
74 TE I (A) Tracking error signal input from the CXA2523AR (IC101)
75 AUX2 I (A) Auxiliary signal input terminal Not used (fixed at “H”)
76 DCHG I (A) Connected to the +3.3V power supply
77 APC I (A) Error signal input for the laser automatic power control Not used (fixed at “L”)
78 ADFG I ADIP duplex FM signal (22.05 kHz ± 1 kHz) input from the CXA2523AR (IC101)
79 F0CNT O Filter f0 control signal output to the CXA2523AR (IC101)
80 XLRF O Serial latch signal output to the CXA2523AR (IC101)
81 CKRF O Serial clock signal output to the CXA2523AR (IC101)
82 DTRF O Writing data output to the CXA2523AR (IC101)
* I (A) for analog input, O (3) for 3-state output, and O (A) for analog output in the column I/O.
Pin No.
Pin Name I/O Function
Phase comparison output for clock playback analog PLL of the playback EFM
Not used (open)
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