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2 - How does a typical microcontroller work?
2.5.1.3 Global interrupt enable bit
The various sources of interrupt may be inhibited as a whole using the I bit in the condition
code register. When this bit is set, no interrupts are generated. However, the interrupt re-
quests are not forgotten; they will be processed as soon as the I bit is reset.
2.5.1.4 Software interrupt instruction
In addition to the hardware sources, a special instruction, TRAP, produces the same effect as
an externally-generated interrupt request, but under program control. Strange as it may seem
(interrupts are provided for handling unexpected events, or at least, events whose time of oc-
currence is not known), the TRAP instruction utilizes the whole interrupt mechanism within the
regular execution of the main program.
The trap instruction triggers the interrupt processing regardless of the state of the I bit in the
condition code register.
An example of the use of the TRAP instruction is the real-time debugger. When the user sets
a breakpoint somewhere in the program, the debugger replaces the instruction at which the
execution must stop with a TRAP instruction. The interrupt thus generated is processed by
displaying on the screen the state of the microcontroller at that precise time. However, this in-
struction may be used in other ways as well.
2.5.1.5 Saving the state of the interrupted program
When an interrupt request triggers an interrupt, the first task of the core (after completing the
current instruction), is to save its current state so it will be able to restore it after the interrupt
processing is finished. This is done by pushing all the core registers on the stack. For ex-
ample, in the ST7, the Program Counter, the X-register, the Accumulator and the Condition
Code Register. It should be noted that the Y registeris not saved, (this is because the ST7 has
evolved from an architecture that didnot have a Y register). If needed, the Y register should be
pushed explicitly on the stack at the beginning of the interrupt service routine.
To protect the interrupt service routine from being interrupted, the I bit of the Condition Code
Register is set automatically.
At this point, the interrupt service routine may execute whatever instructions the programmer
chooses to write. The status of the interrupted program is known and can be restored when
needed.
2.5.1.6 Interrupt vectorization
When the core decides to grant an interrupt request, it must know the address of the code that
must be executed in such an event. This is the purpose of the interrupt vectors.
The interrupt vectors are a table of 16-bit words in program memory that contain the address
of the beginning of the various interrupt service routines.
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