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5 - Peripherals
5 PERIPHERALS
5.1 CLOCK GENERATOR
The core of the ST7 is supplied with an internal clock that comes from the division of the os-
cillator frequency. This division rate is programmable, allowing you to select the best compro-
mise between speed and power consumption.
This choice is programmed using bits located in the Miscellaneous Register. This register also
contains bits used for other purposes; their function will be detailed later in this chapter.
The Miscellaneous Register is laid out differently from one ST7 device type to another. We will
describe only two variants here.
5.1.1 ST72251 Miscellaneous Register
The SMS (slow mode select) bit, when set, places the core and the peripherals in slow mode.
This speed is 1/16 the normal speed, which is the oscillator frequency divided by 2.
The bit MCO (main clock out), when set, enables a clock signal with this frequency to be
output on bit 2 of port C (PC2).
05-misc1
PEI3 PEI2
PEI1 PEI0
MC0
--
SMS
Main Clock Out and Slow Mode Select bits
of the ST72251 Miscellaneous Register
%16 %2
Oscillator
PC2
normal I/O port
f
CPU
to the core and
peripherals
0 normal mode
1slowmode
0 normal I/O
1Pc2=f
CPU
ST72251
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