ST STM32 Application Note

DocID15067 Rev 3 5/49
AN2834 List of figures
5
List of figures
Figure 1. Basic schematic of SAR switched-capacitor ADC (example of 10-bit ADC). . . . . . . . . . . . . 6
Figure 2. Sample state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 3. Hold state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Step 1: Compare with VREF/2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 5. Step 2: If MSB = 0, then compare with ¼VREF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 6. Step 2: If MSB = 1, then compare with ¾VREF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 7. Positive offset error representation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 8. Negative offset error representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 9. Positive gain error representation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 10. Negative gain error representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 11. Differential linearity error representation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 12. Integral linearity error representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 13. Total unadjusted error. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 14. Input signal amplitude vs. ADC dynamic range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 15. Analog signal source resistance effect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 16. Analog input with R
AIN
, C
AIN
and C
p
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 17. Effect of injection current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 18. Crosstalk between I/O pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 19. EMI sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 20. Power supply and reference decoupling for 100- and 144-pin packages. . . . . . . . . . . . . . 23
Figure 21. Power supply decoupling for 36-, 48- and 64-pin packages. . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 22. Simple quasi-triangular source using a microcontroller output . . . . . . . . . . . . . . . . . . . . . . 25
Figure 23. Selecting the reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 24. Preamplification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 25. Worst case error: V
AIN
= V
REF+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 26. Recommended values for R
AIN
and C
AIN
vs. source frequency F
AIN . . . . . . . . . . . . . . . . . . . . . . 30
Figure 27. Crosstalk between I/O pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 28. Shielding technique . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 29. Separating the analog and digital layouts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Figure 30. Separating the analog and digital supplies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 31. Typical voltage source connection to ADC input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Figure 32. Noise observed on ADC input pin during ADC conversions . . . . . . . . . . . . . . . . . . . . . . . . 39
Figure 33. ADC simplified schematic of input stage - sample and hold circuit. . . . . . . . . . . . . . . . . . . 40
Figure 34. ADC input pin noise spikes from internal charge during sampling process . . . . . . . . . . . . 40
Figure 35. Effect of sampling time extension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Figure 36. Charging the external capacitor with too short time between conversions . . . . . . . . . . . . . 42
Figure 37. Implementation of sampling switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Figure 38. Parasitic capacitances of sampling switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Figure 39. Parasitic current example inside ADC structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

ST STM32 Specifications

General

Series	STM32
Category	Microcontrollers
Core	ARM Cortex-M0, Cortex-M0+, Cortex-M3, Cortex-M4, Cortex-M7, Cortex-M33
Clock Speed	Up to 480 MHz
GPIO Pins	Up to 144
Communication Interfaces	I2C, SPI, USART, USB, CAN, Ethernet
Package Types	LQFP, BGA, WLCSP
ADC Resolution	12-bit, 16-bit (varies by series)
DAC Resolution	12-bit (varies by series)
Operating Temperature	-40°C to +85°C or +105°C