CC1101
SWRS061H Page 23 of 98
7.2 Balun and RF Matching
The balanced RF input and output of
CC1101
share two common pins and are designed for
a simple, low-cost matching and balun network
on the printed circuit board. The receive- and
transmit switching at the
CC1101
front-end is
controlled by a dedicated on-chip function,
eliminating the need for an external RX/TX-
switch.
A few external passive components combined
with the internal RX/TX switch/termination
circuitry ensures match in both RX and TX
mode. The components between the
RF_N/RF_P pins and the point where the two
signals are joined together (C131, C121, L121
and L131 for the 315/433 MHz reference
design [1], and L121, L131, C121, L122,
C131, C122 and L132 for the 868/915 MHz
reference design [2]) form a balun that
converts the differential RF signal on
CC1101
to
a single-ended RF signal. C124 is needed for
DC blocking. Together with an appropriate LC
network, the balun components also transform
the impedance to match a 50 load. C125
provides DC blocking and is only needed if
there is a DC path in the antenna. For the
868/915 MHz reference design, this
component may also be used for additional
filtering, see Section 7.5 below.
Suggested values for 315 MHz, 433 MHz, and
868/915 MHz are listed in Table 21.
The balun and LC filter component values and
their placement are important to keep the
performance optimized. It is highly
recommended to follow the CC1101EM
reference design ([1] and [2]). Gerber files and
schematics for the reference designs are
available for download from the TI website.
7.3 Crystal
A crystal in the frequency range 26-27 MHz
must be connected between the XOSC_Q1
and XOSC_Q2 pins. The oscillator is designed
for parallel mode operation of the crystal. In
addition, loading capacitors (C81 and C101)
for the crystal are required. The loading
capacitor values depend on the total load
capacitance, C
L
, specified for the crystal. The
total load capacitance seen between the
crystal terminals should equal C
L
for the
crystal to oscillate at the specified frequency.
parasiticL
C
CC
C
10181
11
1
The parasitic capacitance is constituted by pin
input capacitance and PCB stray capacitance.
Total parasitic capacitance is typically 2.5 pF.
The crystal oscillator is amplitude regulated.
This means that a high current is used to start
up the oscillations. When the amplitude builds
up, the current is reduced to what is necessary
to maintain approximately 0.4 Vpp signal
swing. This ensures a fast start-up, and keeps
the drive level to a minimum. The ESR of the
crystal should be within the specification in
order to ensure a reliable start-up (see Section
4.4).
The initial tolerance, temperature drift, aging
and load pulling should be carefully specified
in order to meet the required frequency
accuracy in a certain application.
Avoid routing digital signals with sharp edges
close to XOSC_Q1 PCB track or underneath
the crystal Q1 pad as this may shift the crystal
dc operating point and result in duty cycle
variation.
For compliance with modulation bandwidth
requirements under EN 300 220 in the 863 to
870 MHz frequency range it is recommended
to use a 26 MHz crystal for frequencies below
869 MHz and a 27 MHz crystal for frequencies
above 869 MHz.
7.4 Reference Signal
The chip can alternatively be operated with a
reference signal from 26 to 27 MHz instead of
a crystal. This input clock can either be a full-
swing digital signal (0 V to VDD) or a sine
wave of maximum 1 V peak-peak amplitude.
The reference signal must be connected to the
XOSC_Q1 input. The sine wave must be
connected to XOSC_Q1 using a serial
capacitor. When using a full-swing digital
signal, this capacitor can be omitted. The
XOSC_Q2 line must be left un-connected. C81
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