CC1101
SWRS061H Page 71 of 98
29.1 Configuration Register Details – Registers with preserved values in SLEEP state
0x00: IOCFG2 – GDO2 Output Pin Configuration
Invert output, i.e. select active low (1) / high (0)
Default is CHP_RDYn (See Table 41 on page 62).
0x01: IOCFG1 – GDO1 Output Pin Configuration
Set high (1) or low (0) output drive strength on the GDO pins.
Invert output, i.e. select active low (1) / high (0)
Default is 3-state (See Table 41 on page 62).
0x02: IOCFG0 – GDO0 Output Pin Configuration
Enable analog temperature sensor. Write 0 in all other register
bits when using temperature sensor.
Invert output, i.e. select active low (1) / high (0)
Default is CLK_XOSC/192 (See Table 41 on page 62).
It is recommended to disable the clock output in initialization, in
order to optimize RF performance.