Texas Instruments CC1101 User Manual

CC1101
SWRS061H Page 58 of 98
22 VCO
The VCO is completely integrated on-chip.
22.1 VCO and PLL Self-Calibration
The VCO characteristics vary with temperature
and supply voltage changes as well as the
desired operating frequency. In order to
ensure reliable operation, CC1101 includes
frequency synthesizer self-calibration circuitry.
This calibration should be done regularly, and
must be performed after turning on power and
before using a new frequency (or channel).
The number of XOSC cycles for completing
the PLL calibration is given in Table 34 on
page 54.
The calibration can be initiated automatically
or manually. The synthesizer can be
automatically calibrated each time the
synthesizer is turned on, or each time the
synthesizer is turned off automatically. This is
configured with the MCSM0.FS_AUTOCAL
register setting. In manual mode, the
calibration is initiated when the SCAL
command strobe is activated in the IDLE
mode.
If calibration is performed each time before
entering active mode (RX or TX) the user can
program register IOCFGx.GDOx_CFG to 0x0A
to check that the PLL is in lock. The lock
detector output available on the GDOx pin
should then be an interrupt for the MCU (x =
0,1, or 2). A positive transition on the GDOx
pin means that the PLL is in lock. As an
alternative the user can read register FSCAL1.
The PLL is in lock if the register content is
different from 0x3F. Refer also to the CC1101
Errata Notes [3]. The PLL must be re-
calibrated until PLL lock is achieved if the PLL
does not lock the first time.
If the calibration is not performed each time
before entering active mode (RX or TX) the
user should program register
IOCFGx.GDOx_CFG to 0x0A to check that the
PLL is in lock before receiving/transmitting
data. The lock detector output available on the
GDOx pin should then be an interrupt for the
MCU (x = 0,1, or 2). A positive transition on
the GDOx pin means that the PLL is in lock.
Since the current calibration values are only
valid for a finite temperature range (typically
±40C) the PLL must be re-calibrated if the lock
indicator does not indicate PLL lock.
23 Voltage Regulators
CC1101 contains several on-chip linear voltage
regulators that generate the supply voltages
needed by low-voltage modules. These
voltage regulators are invisible to the user, and
can be viewed as integral parts of the various
modules. The user must however make sure
that the absolute maximum ratings and
required pin voltages in Table 1 and Table 19
are not exceeded.
By setting the CSn pin low, the voltage
regulator to the digital core turns on and the
crystal oscillator starts. The SO pin on the SPI
interface must go low before the first positive
edge of SCLK (setup time is given in Table
22).
If the chip is programmed to enter power-down
mode (SPWD strobe issued), the power will be
turned off after CSn goes high. The power and
crystal oscillator will be turned on again when
CSn goes low.
The voltage regulator for the digital core
requires one external decoupling capacitor.
The voltage regulator output should only be
used for driving the CC1101 .
Note: The calibration values are
maintained in SLEEP mode, so the
calibration is still valid after waking up from
SLEEP mode unless supply voltage or
temperature has changed significantly.

Texas Instruments CC1101 Specifications

General

Brand	Texas Instruments
Model	CC1101
Category	Transceiver
Language	English