CC1101
SWRS061H Page 67 of 98
Table 45 summarizes the SPI address space.
The address to use is given by adding the
base address to the left and the burst and
read/write bits on the top. Note that the burst
bit has different meaning for base addresses
above and below 0x2F.
Enable and calibrate frequency synthesizer (if MCSM0.FS_AUTOCAL=1). If in RX (with CCA):
Go to a wait state where only the synthesizer is running (for quick RX / TX turnaround).
Turn off crystal oscillator.
Calibrate frequency synthesizer and turn it off. SCAL can be strobed from IDLE mode without
setting manual calibration mode (MCSM0.FS_AUTOCAL=0)
Enable RX. Perform calibration first if coming from IDLE and MCSM0.FS_AUTOCAL=1.
In IDLE state: Enable TX. Perform calibration first if MCSM0.FS_AUTOCAL=1.
If in RX state and CCA is enabled: Only go to TX if channel is clear.
Exit RX / TX, turn off frequency synthesizer and exit Wake-On-Radio mode if applicable.
Start automatic RX polling sequence (Wake-on-Radio) as described in Section 19.5 if
WORCTRL.RC_PD=0.
Enter power down mode when CSn goes high.
Flush the RX FIFO buffer. Only issue SFRX in IDLE or RXFIFO_OVERFLOW states.
Flush the TX FIFO buffer. Only issue SFTX in IDLE or TXFIFO_UNDERFLOW states.
Reset real time clock to Event1 value.
No operation. May be used to get access to the chip status byte.
Table 42: Command Strobes
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