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Texas Instruments CC1101 User Manual

Texas Instruments CC1101
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CC1101
SWRS061H Page 73 of 98
0x04: SYNC1 Sync Word, High Byte
Bit
Field Name
Reset
R/W
Description
7:0
SYNC[15:8]
211 (0xD3)
R/W
8 MSB of 16-bit sync word
0x05: SYNC0 Sync Word, Low Byte
Bit
Field Name
Reset
R/W
Description
7:0
SYNC[7:0]
145 (0x91)
R/W
8 LSB of 16-bit sync word
0x06: PKTLEN Packet Length
Bit
Field Name
Reset
R/W
Description
7:0
PACKET_LENGTH
255 (0xFF)
R/W
Indicates the packet length when fixed packet length mode is enabled. If
variable packet length mode is used, this value indicates the maximum
packet length allowed. This value must be different from 0.
0x07: PKTCTRL1 Packet Automation Control
Bit
Field Name
Reset
R/W
Description
7:5
PQT[2:0]
0 (0x00)
R/W
Preamble quality estimator threshold. The preamble quality estimator
increases an internal counter by one each time a bit is received that is
different from the previous bit, and decreases the counter by 8 each time a
bit is received that is the same as the last bit.
A threshold of 4∙PQT for this counter is used to gate sync word detection.
When PQT=0 a sync word is always accepted.
4
0
R0
Not Used.
3
CRC_AUTOFLUSH
0
R/W
Enable automatic flush of RX FIFO when CRC is not OK. This requires that
only one packet is in the RXIFIFO and that packet length is limited to the
RX FIFO size.
2
APPEND_STATUS
1
R/W
When enabled, two status bytes will be appended to the payload of the
packet. The status bytes contain RSSI and LQI values, as well as CRC OK.
1:0
ADR_CHK[1:0]
0 (00)
R/W
Controls address check configuration of received packages.
Setting
Address check configuration
0 (00)
No address check
1 (01)
Address check, no broadcast
2 (10)
Address check and 0 (0x00) broadcast
3 (11)
Address check and 0 (0x00) and 255 (0xFF)
broadcast

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Texas Instruments CC1101 Specifications

General IconGeneral
BrandTexas Instruments
ModelCC1101
CategoryTransceiver
LanguageEnglish

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