VIPA CPU Series User Manual

Chapter 3 Deployment CPU 21x-1Bx06 Manual VIPA System 200V
3-26 HB97E - CPU - RE_21x-1Bx06 - Rev. 13/20
Event-ID Description
0xE003 Error at access to I/O devices
Zinfo1: I/O address
Zinfo2: Slot
0xE004 Multiple parameterization of a I/O address
Zinfo1: I/O address
Zinfo2: Slot
0xE005 Internal error – Please contact the VIPA-Hotline!
0xE006 Internal error – Please contact the VIPA-Hotline!
0xE007 Configured in-/output bytes do not fit into I/O area
0xE008 Internal error – Please contact the VIPA-Hotline!
0xE009 Error at access to standard back plane bus
0xE010 Not defined module group at backplane bus recognized
Zinfo2: Slot
Zinfo3: Type ID
0xE011 Master project engineering at Slave-CPU not possible or wrong slave configuration
0xE012 Error at parameterization
0xE013 Error at shift register access to VBUS digital modules
0xE014 Error at Check_Sys
0xE015 Error at access to the master
Zinfo2: Slot of the master (32=page frame master)
0xE016 Maximum block size at master transfer exceeded
Zinfo1: I/O address
Zinfo2: Slot
0xE017 Error at access to integrated slave
0xE018 Error at mapping of the master I/O devices
0xE019 Error at standard back plane bus system recognition
0xE01A Error at recognition of the operating mode (8 / 9 Bit)
0xE0CC Communication error MPI / Serial
0xE100 MMC access error
0xE101 MMC error file system
0xE102 MMC error FAT
0xE104 MMC error at saving
0xE200 MMC writing finished (Copy Ram to Rom)
0xE210 MMC reading finished (reload after overall reset)
0xE300 Internal Flash writing ready (Copy RAM to ROM)
0xE310 Internal Flash reading finished (reload after battery failure)
Overview of the
Event-IDs

VIPA CPU Series Specifications

General

Series	VIPA CPU Series
Communication Ports	Ethernet
Power Supply	24 V DC
Operating Temperature	0°C to +60°C
Certifications	CE, UL, cUL