Instruction in memory:
Instruction in instruction register:
I
IIII
Byte
operation
indexing
alignment:
Halfword
operation
indexing
alignment:
Word
operation
indexing
alignment:
Shift
operation
indexing
alignment:
Doubleword
operation
indexing
alignment:
Effective virtual address:
Figure
6.
Index
Displacement
AI
ignment (Real
and
Virtual Addressing Modes)
ADDRESS
MODIFICATION
EXAMPLE: INDIRECT,
INDEXED HALFWORD
(VIRTUAL
ADDRESSING)
Figure 7 i
"ustrates
the
address
modification
and
mapping
process for
an
indirectly
addressed,
indexed,
halfword
op-
eration.
As
shown,
reference
address 1
is
the
content
of
the
reference
address field in
the
instruction stored in mem-
ory.
The instruction
is
brought
into
the
instruction
register,
and
if
the
value
of
the
reference
address
field
is
greater
than
15,
the
memory map
converts
the
19-bit
effective
vir-
tual
address into a
22-bit
actual
address.
The
17
low-order
bits of
the
main memory
location
pointed
to by
the
actual
address,
labeled
reference
address
2,
then
replaces
refer-
ence
address 1 in
the
instruction
register.
The index
register
designated
by
the
X
field
of
the
instruction
is
subsequently
aligned
for
incrementing
at
the
halfword-address
level.
The
final
effective
virtual
address
is
formed by
the
address
gen-
erator,
and
if
the
value
of
the
reference
address
is
greater
than
15,
the
effective
virtual
address
is
transformed through
the
memory map
into
an
actual
address.
The
resultant
22-bit
actual
(main memory) address,
which
automatically
contains
a
low-order
0,
is
then used to
access
the
halfword
to
be
used
as
the
operand for
the
instruction.
Note
that
for
the
real
addressing mode,
the
modifications
required
for
indirect,
indexed
halfword
operation
are
the
same
with
one
exception:
reference
address 1
and
the
final
effective
address
are
concatenated
with
three
leading
zeros
(as opposed to
being
transformed by the memory
map).
REAL-EXTENDED ADDRESSING
Real-extended
addressing
is
simi lar to
real
addressing in
that
a
direct
relationship
exists
between
the
effective
virtual
ad-
dress
of
each
instruction
and
the
actual
address.
The
func-
tion
of
real-extended
addressing
is
to
facilitate
operations
in a memory system
larger
than
128K words.
Note:
Instructions
and
indirect
addresses
that
involve
real-extended
address
calculations
must themselves
reside in
the
first 128K words of memory (or in
the
general
registers),
although
they
in turn may
ulti-
mately
access
operands in locations beyond
the
first
128K words
of
memory.
Main
Memory
21
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