Xilinx MultiLINX Series User Manual

Hardware User Guide
2-4 Xilinx Development System
CCLK Configuration Clock —isthe
configuration clock pin, and the
default clock for readback opera-
tion.
DONE (D/P) Done/Program — represents the
D/~P pin for XC3000A/L and
XC3100A devices, and DONE for
XC4000, XC5200 and Spartan
devices. This pin indicates that
the configuration process is
complete for XC4000, XC5200,
and Spartan devices. This same
pin initiates a reconfiguration,
and indicates that the configura-
tion process is complete on
XC3000 FPGAs.
DIN Data In — Provides configuration
data to target system during
configuration and is tristated at
all other times.
PROG Program — A Low indicates the
device is clearing its configura-
tion memory.
Active Low signal to initiate the
configuration process.
INIT Initialize — Initialization
sequencing pin during configu-
ration (Indicates start of configu-
ration).
A logical zero on this pin during
configuration indicates a data
error.
Table 2-2 MultiLINX Pin Descriptions
Signal Name Function

Xilinx MultiLINX Series Specifications

General

Brand	Xilinx
Model	MultiLINX Series
Category	Cables and connectors
Language	English