Xilinx VC709 User Manual

20 www.xilinx.com VC709 Evaluation Board
UG887 (v1.0) February 4, 2013
Chapter 1: VC709 Evaluation Board Features
be selected to configure the FPGA by appropriately setting the DIP switch SW11. The
connections between the BPI flash memory and the FPGA are listed in Table 1-6.
Table 1-6: BPI Flash Memory Connections to the FPGA
FPGA (U1) Pin Net Name
BPI Flash Memory (U3)
Pin Number Pin Name
AJ28 FLASH_A0 A1 A1
AH28 FLASH_A1 B1 A2
AG31 FLASH_A2 C1 A3
AF30 FLASH_A3 D1 A4
AK29 FLASH_A4 D2 A5
AK28 FLASH_A5 A2 A6
AG29 FLASH_A6 C2 A7
AK30 FLASH_A7 A3 A8
AJ30 FLASH_A8 B3 A9
AH30 FLASH_A9 C3 A10
AH29 FLASH_A10 D3 A11
AL30 FLASH_A11 C4 A12
AL29 FLASH_A12 A5 A13
AN33 FLASH_A13 B5 A14
AM33 FLASH_A14 C5 A15
AM32 FLASH_A15 D7 A16
AV41 FLASH_A16 D8 A17
AU41 FLASH_A17 A7 A18
BA42 FLASH_A18 B7 A19
AU42 FLASH_A19 C7 A20
AT41 FLASH_A20 C8 A21
BA39 FLASH_A21 A8 A22
BA39 FLASH_A22 G1 A23
BB39 FLASH_A23 H8 A24
AW42 FLASH_A24 B6 A25
AW41 FLASH_A25 B8 A26
NA NC H1 A27
AM36 FLASH_D0 F2 DQ0
AN36 FLASH_D1 E2 DQ1
AJ36 FLASH_D2 G3 DQ2

Xilinx VC709 Specifications

General

Brand	Xilinx
Model	VC709
Category	Motherboard
Language	English