Xilinx VC709 - Page 84

84 www.xilinx.com VC709 Evaluation Board
UG887 (v1.0) February 4, 2013
Appendix C: Master UCF Listing
NET FMC1_HPC_DP6_C2M_P LOC = G2 ;# MGTXTXP2_118
NET FMC1_HPC_DP6_C2M_N LOC = G1 ;# MGTXTXN2_118
NET FMC1_HPC_DP5_C2M_P LOC = H4 ;# MGTXTXP1_118
NET FMC1_HPC_DP5_C2M_N LOC = H3 ;# MGTXTXN1_118
NET FMC1_HPC_DP4_C2M_P LOC = J2 ;# MGTXTXP0_118
NET FMC1_HPC_DP4_C2M_N LOC = J1 ;# MGTXTXN0_118
NET FMC1_HPC_DP3_C2M_P LOC = B4 ;# MGTXTXP3_119
NET FMC1_HPC_DP3_C2M_N LOC = B3 ;# MGTXTXN3_119
NET FMC1_HPC_DP2_C2M_P LOC = C2 ;# MGTXTXP2_119
NET FMC1_HPC_DP2_C2M_N LOC = C1 ;# MGTXTXN2_119
NET FMC1_HPC_DP1_C2M_P LOC = D4 ;# MGTXTXP1_119
NET FMC1_HPC_DP1_C2M_N LOC = D3 ;# MGTXTXN1_119
NET FMC1_HPC_DP0_C2M_P LOC = E2 ;# MGTXTXP0_119
NET FMC1_HPC_DP0_C2M_N LOC = E1 ;# MGTXTXN0_119
##
## FMC1 HPC GTH Receiver Lanes
##
NET FMC1_HPC_DP9_M2C_P LOC = N6 ;# MGTXRXP1_117
NET FMC1_HPC_DP9_M2C_N LOC = N5 ;# MGTXRXN1_117
NET FMC1_HPC_DP8_M2C_P LOC = P8 ;# MGTXRXP0_117
NET FMC1_HPC_DP8_M2C_N LOC = P7 ;# MGTXRXN0_117
NET FMC1_HPC_DP7_M2C_P LOC = E6 ;# MGTXRXP3_118
NET FMC1_HPC_DP7_M2C_N LOC = E5 ;# MGTXRXN3_118
NET FMC1_HPC_DP6_M2C_P LOC = F8 ;# MGTXRXP2_118
NET FMC1_HPC_DP6_M2C_N LOC = F7 ;# MGTXRXN2_118
NET FMC1_HPC_DP5_M2C_P LOC = G6 ;# MGTXRXP1_118
NET FMC1_HPC_DP5_M2C_N LOC = G5 ;# MGTXRXN1_118
NET FMC1_HPC_DP4_M2C_P LOC = H8 ;# MGTXRXP0_118
NET FMC1_HPC_DP4_M2C_N LOC = H7 ;# MGTXRXN0_118
NET FMC1_HPC_DP3_M2C_P LOC = A6 ;# MGTXRXP3_119
NET FMC1_HPC_DP3_M2C_N LOC = A5 ;# MGTXRXN3_119
NET FMC1_HPC_DP2_M2C_P LOC = B8 ;# MGTXRXP2_119
NET FMC1_HPC_DP2_M2C_N LOC = B7 ;# MGTXRXN2_119
NET FMC1_HPC_DP1_M2C_P LOC = C6 ;# MGTXRXP1_119
NET FMC1_HPC_DP1_M2C_N LOC = C5 ;# MGTXRXN1_119
NET FMC1_HPC_DP0_M2C_P LOC = D8 ;# MGTXRXP0_119
NET FMC1_HPC_DP0_M2C_N LOC = D7 ;# MGTXRXN0_119
##
## FMC1 HPC GTH REFCLKS
##
NET FMC1_HPC_GBTCLK1_M2C_C_P LOC = E10 ;# MGTREFCLK0P_118
NET FMC1_HPC_GBTCLK1_M2C_C_N LOC = E9 ;# MGTREFCLK0N_118
NET FMC1_HPC_GBTCLK0_M2C_C_N LOC = G9 ;# MGTREFCLK1N_118
NET FMC1_HPC_GBTCLK0_M2C_C_P LOC = G10 ;# MGTREFCLK1P_118
###########################################
##
## PCI Express P1 Interface
## 8 lanes
## GTH QUADS 114 & 115
##
###########################################
##
## PCIE Add-In-Card Transmitter Lanes
##
NET PCIE_TX[7]_P LOC = AK4 ;# MGTXTXP0_114
NET PCIE_TX[7]_N LOC = AK3 ;# MGTXTXN0_114
NET PCIE_TX[6]_P LOC = AJ2 ;# MGTXTXP1_114