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Xilinx Virtex-4 User Manual

Xilinx Virtex-4
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Embedded Tri-Mode Ethernet MAC User Guide www.xilinx.com 125
UG074 (v2.2) February 22, 2010
10/100/1000 Serial Gigabit Media Independent Interface (SGMII)
R
MGT Elastic Buffer (Ring Buffer)
The RX ring buffer in the MGTs has 64 entries, and acts as an elastic buffer. Upon
initialization or reset, the buffer goes to half full. However, the buffer cannot be assumed to
be exactly half full at the start of frame reception. Additionally, the underflow and
overflow thresholds are not exact.
Figure 4-18 illustrates the elastic buffer depths and thresholds of MGTs in Virtex-4 devices.
Each FIFO word corresponds to a single character of data (equivalent to a single byte of
data following 8B/10B decoding).
The shaded area represents the usable buffer for the duration of frame reception.
If the buffer is filling during frame reception, then there are 57 34 = 23 FIFO
locations available before the buffer hits the overflow mark.
If the buffer is emptying during reception, then there are 30 16 = 14 FIFO locations
available before the buffer hits the underflow mark.
This analysis assumes that the buffer is approximately at the half-full level at the start of
the frame reception. There are, as illustrated, two locations of uncertainty above and below
the exact half-full mark of 32. The uncertainty is a result of the clock correction decision,
which is performed in a different clock domain.
Since there is a worst case scenario of one clock edge difference every 5000 clock periods,
the maximum number of clock cycles (bytes) that can exist in a single frame passing
through the buffer before an error occurs is 5,000 x 14 = 70,000 bytes.
Table 4-4 translates this into maximum frame lengths at different Ethernet MAC speeds.
The situation is worse at SGMII speeds lower than 1 Gb/s because bytes are repeated
multiple times.
Figure 4-18: Elastic Buffer Size for MGTs
Table 4-4: Maximum Frame Sizes for MGT RX Elastic Buffers (100 ppm Clock Tol.)
Standard Speed Maximum Frame Size
1000BASE-X 1 Gb/s only 70,000
SGMII 1 Gb/s 70,000
64
57 - Overflow Mark
34
30
16 - Underflow Mark
GT11 RX Elastic Buffer
UG074_c6_28_012408
www.BDTIC.com/XILINX

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Xilinx Virtex-4 Specifications

General IconGeneral
BrandXilinx
ModelVirtex-4
CategoryMotherboard
LanguageEnglish

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